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| author | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-07-16 16:59:35 +0100 |
|---|---|---|
| committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-07-19 09:10:54 +0100 |
| commit | 8f5e84bf8dabfddc6b853c522fdc29be90c93746 (patch) | |
| tree | e9a3bbe13b368ae3d7299cd73e0c2ec9d49ed0d0 /tcl | |
| parent | d249057adfeb3f652df86ad321577744910b6e21 (diff) | |
| download | openocd+libswd-8f5e84bf8dabfddc6b853c522fdc29be90c93746.tar.gz openocd+libswd-8f5e84bf8dabfddc6b853c522fdc29be90c93746.tar.bz2 openocd+libswd-8f5e84bf8dabfddc6b853c522fdc29be90c93746.tar.xz openocd+libswd-8f5e84bf8dabfddc6b853c522fdc29be90c93746.zip | |
cfg: update rsc-w910 script
- Only enable the FMI (NAND) and DMA clocks.
- Select NAND interface on the MFSEL.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/board/rsc-w910.cfg | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/tcl/board/rsc-w910.cfg b/tcl/board/rsc-w910.cfg index f7095a68..eba44f62 100644 --- a/tcl/board/rsc-w910.cfg +++ b/tcl/board/rsc-w910.cfg @@ -31,11 +31,12 @@ $_TARGETNAME configure -event reset-init { # switch on PLL for 200MHz operation # running from 15MHz input clock - mww 0xB0000200 0x45180bb1 # CLKEN + mww 0xB0000200 0x00000030 # CLKEN mww 0xB0000204 0x00000f3c # CLKSEL mww 0xB0000208 0x05007000 # CLKDIV mww 0xB000020C 0x00004f24 # PLLCON0 mww 0xB0000210 0x00002b63 # PLLCON1 + mww 0xB000000C 0x08817fa6 # MFSEL sleep 10 # we are now running @ 200MHz |