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author | Spencer Oliver <ntfreak@users.sourceforge.net> | 2009-12-21 17:23:09 +0000 |
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committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-01-05 19:54:37 +0000 |
commit | ba96fc3e9de935708cd5fa7c38e547dc7598087d (patch) | |
tree | b5bbd2972f855e2f10b7bc58aa97a04e7a72097a /tcl | |
parent | f6412d9c7b22ab25caec6be19317f0fc4a840fdd (diff) | |
download | openocd+libswd-ba96fc3e9de935708cd5fa7c38e547dc7598087d.tar.gz openocd+libswd-ba96fc3e9de935708cd5fa7c38e547dc7598087d.tar.bz2 openocd+libswd-ba96fc3e9de935708cd5fa7c38e547dc7598087d.tar.xz openocd+libswd-ba96fc3e9de935708cd5fa7c38e547dc7598087d.zip |
PIC32: enable ram execution
add reset-init script to allow ram execution from reset, this is required for ejtag fastdata access.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'tcl')
-rw-r--r-- | tcl/target/pic32mx.cfg | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg index e0ebdc26..1561d730 100644 --- a/tcl/target/pic32mx.cfg +++ b/tcl/target/pic32mx.cfg @@ -31,7 +31,23 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME -$_TARGETNAME configure -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size 16384 -work-area-backup 0 + +$_TARGETNAME configure -event reset-init { + # + # from reset the pic32 cannot execute code in ram - enable ram execution + # minimum offset from start of ram is 2k + # + + # BMXCON + mww 0xbf882000 0x001f0040 + # BMXDKPBA: 0xa0000800 + mww 0xbf882010 0x00000800 + # BMXDUDBA + mww 0xbf882020 0x00004000 + # BMXDUPBA + mww 0xbf882030 0x00004000 +} set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME pic32mx 0xbd000000 0 0 0 $_TARGETNAME |