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author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-06 10:34:49 +0000 |
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committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-06 10:34:49 +0000 |
commit | d6a686c8521d0dab4f5a0f44f8fb6d49a43bea8b (patch) | |
tree | b7634808c45cb9e7232c9fdf715e007003a6a235 /testing/examples/LPC2148Test/test_rom.map | |
parent | a604b570da3bedd9f633acc73b03956a9f802b85 (diff) | |
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Ferdinand Postema <ferdinand@postema.eu>:
Updates to private TAP state tables in amtjtagaccel interface driver.
The first change is the neccesary one to correct a long-standing bug that
caused the IDCODE to be shifted by one bit too many. This was caused by
an incorrect path from state RESET to state DRSHIFT.
The value of those 2 bytes were 0x8a and 0x04. This means that the
bitstream to do this transition is 0b 00100 01010 (send LSB first). This
will bring you from the reset state to the shift state; however, you
enter the shift-state twice, which explains why the ID-CODE that will be
read next will be shifted 1 bit. The fix changes these to 0x05 and 0x00.
This will send the bitstream 0b 00101 (send LSB first). This will bring
the TAP controller from the RESET state to the DRSHIFT state directly,
without entering the DRSHIFT state twice.
After checking the whole table, two other transitions were found that
could be optimized (5 bits in stead of 10 bits).
Summary off all changes:
From To Old values Old Bitstream New values New Bitstream Remarks
---- ------- ---------- ------------- ---------- ------------- -------
RESET DRSHIFT 0x8a 0x04 0b00100 01010 0x05 0x00 0b00101 1,2
IDLE DRSHIFT 0x85 0x08 0b01000 00101 0x04 0x00 0b00100 2
IDLE IRSHIFT 0x8b 0x08 0b01000 01011 0x06 0x00 0b00110 2
[1] Fixes the IDCODE bug
[2] Optimization
git-svn-id: svn://svn.berlios.de/openocd/trunk@2472 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'testing/examples/LPC2148Test/test_rom.map')
0 files changed, 0 insertions, 0 deletions