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authorDavid Brownell <dbrownell@users.sourceforge.net>2009-11-24 01:27:29 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-11-24 01:27:29 -0800
commit3efc99b34a934cb4d657ec27a164769c46c10f28 (patch)
treec08b985f274dc428f4c769f20e471b8ca81879c7 /testing/examples/STR710Test
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ARM11: remove old R0..R15/CPSR code
This finishes the basic switchover to the new register code, for everything except the debug registers. (And maybe we shouldn't have a cache for *those* which works this way...) The context save/restore code now uses the new code, but it's in a slightly different sequence. That should be fine since the R0/PC/CPSR stuff is all that really matters (and if we can update those, we can update the rest). Now there's no longer a way any code can be confused about which copy of "r1" (etc) to use. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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