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author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-03 16:08:04 -0800 |
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committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-03 16:08:04 -0800 |
commit | eb6c880ddcb06cb011ebd4557d9057d04ab9b4fb (patch) | |
tree | f53fd2d9108872af5b5166fb9e211c3ef53a5e25 /testing/testcases.html | |
parent | adbf40a04537acba3cf5fea7b71dab6ac3249646 (diff) | |
download | openocd+libswd-eb6c880ddcb06cb011ebd4557d9057d04ab9b4fb.tar.gz openocd+libswd-eb6c880ddcb06cb011ebd4557d9057d04ab9b4fb.tar.bz2 openocd+libswd-eb6c880ddcb06cb011ebd4557d9057d04ab9b4fb.tar.xz openocd+libswd-eb6c880ddcb06cb011ebd4557d9057d04ab9b4fb.zip |
ARM DPM: make DSCR bit defs sharable
Move the symbols for these bits from "armv7a.h" to "arm_dpm.h",
where they can be seen and used not just by Cortex-A but also
by the ARM11 (armv6) code.
Change them from bit numbers to bit masks ... this matches the
usage in ARM11 code, and also makes it easier to read.
Rename DSCR_EXT_INT_EN as DSCR_ITR_EN to match the docs; it's
enabling ITR functionality, not external interrupts, so this
changes the name to be less misleading. (There *IS* a bit
affecting interrupts, and this isn't it.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'testing/testcases.html')
0 files changed, 0 insertions, 0 deletions