diff options
-rw-r--r-- | src/target/board/x300t.cfg | 34 | ||||
-rw-r--r-- | src/target/interface/parport_dlc5.cfg | 14 | ||||
-rw-r--r-- | src/target/target/smp8634.cfg | 64 |
3 files changed, 56 insertions, 56 deletions
diff --git a/src/target/board/x300t.cfg b/src/target/board/x300t.cfg index 200bb58b..edc9be6c 100644 --- a/src/target/board/x300t.cfg +++ b/src/target/board/x300t.cfg @@ -1,17 +1,17 @@ -# This is for the T-Home X300T / X301T IPTV box,
-# which are based on IPTV reference designs from Kiss/Cisco KMM-32**
-#
-# It has Sigma Designs SMP8634 chip.
-source [find target/smp8634.cfg]
-
-$_TARGETNAME configure -event reset-init { x300t_init }
-
-# 1MB CFI capable flash
-# flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank cfi 0xac000000 0x100000 2 2 0
-
-proc x300t_init { } {
- # Setup SDRAM config and flash mapping
- # map flash to CPU address space REG_BASE_cpu_block+CPU_remap4
- mww 0x6f010 0x48000000
-}
+# This is for the T-Home X300T / X301T IPTV box, +# which are based on IPTV reference designs from Kiss/Cisco KMM-32** +# +# It has Sigma Designs SMP8634 chip. +source [find target/smp8634.cfg] + +$_TARGETNAME configure -event reset-init { x300t_init } + +# 1MB CFI capable flash +# flash bank <driver> <base> <size> <chip_width> <bus_width> +flash bank cfi 0xac000000 0x100000 2 2 0 + +proc x300t_init { } { + # Setup SDRAM config and flash mapping + # map flash to CPU address space REG_BASE_cpu_block+CPU_remap4 + mww 0x6f010 0x48000000 +} diff --git a/src/target/interface/parport_dlc5.cfg b/src/target/interface/parport_dlc5.cfg index 346aedec..c9af2629 100644 --- a/src/target/interface/parport_dlc5.cfg +++ b/src/target/interface/parport_dlc5.cfg @@ -1,7 +1,7 @@ -telnet_port 4444
-gdb_port 2001
-
-interface parport
-parport_port /dev/parport0
-parport_cable dlc5
-jtag_speed 0
+telnet_port 4444 +gdb_port 2001 + +interface parport +parport_port /dev/parport0 +parport_cable dlc5 +jtag_speed 0 diff --git a/src/target/target/smp8634.cfg b/src/target/target/smp8634.cfg index 2470a5da..c1d61882 100644 --- a/src/target/target/smp8634.cfg +++ b/src/target/target/smp8634.cfg @@ -1,32 +1,32 @@ -# script for Sigma Designs SMP8634 (eventually even SMP8635)
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME smp8634
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- # force an error till we get a good number
- set _CPUTAPID 0x08630001
-}
-
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
-
-reset_config trst_and_srst separate
-
-# jtag scan chain
-# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant
+# script for Sigma Designs SMP8634 (eventually even SMP8635) + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME smp8634 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + # force an error till we get a good number + set _CPUTAPID 0x08630001 +} + +jtag_nsrst_delay 100 +jtag_ntrst_delay 100 + +reset_config trst_and_srst separate + +# jtag scan chain +# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1 + +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant |