diff options
| -rw-r--r-- | doc/openocd.texi | 9 | ||||
| -rw-r--r-- | src/target/cortex_m3.c | 39 |
2 files changed, 48 insertions, 0 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 7e537b32..b436ab72 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -1759,6 +1759,15 @@ is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache). @*Translate a virtual address to a physical address. @end itemize +@subsection CORTEX_M3 specific commands +@cindex CORTEX_M3 specific commands + +@itemize @bullet +@item @b{cortex_m3 maskisr} <@var{on}|@var{off}> +@cindex cortex_m3 maskisr +@*Enable masking (disabling) interrupts during target step/resume. +@end itemize + @page @section Debug commands @cindex Debug commands diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index d938210a..5816981c 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -44,6 +44,7 @@ /* cli handling */ int cortex_m3_register_commands(struct command_context_s *cmd_ctx); +int handle_cortex_m3_mask_interrupts_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); /* forward declarations */ void cortex_m3_enable_breakpoints(struct target_s *target); @@ -1568,8 +1569,46 @@ int cortex_m3_target_create(struct target_s *target, Jim_Interp *interp) int cortex_m3_register_commands(struct command_context_s *cmd_ctx) { int retval; + command_t *cortex_m3_cmd; retval = armv7m_register_commands(cmd_ctx); + cortex_m3_cmd = register_command(cmd_ctx, NULL, "cortex_m3", NULL, COMMAND_ANY, "cortex_m3 specific commands"); + register_command(cmd_ctx, cortex_m3_cmd, "maskisr", handle_cortex_m3_mask_interrupts_command, COMMAND_EXEC, "mask cortex_m3 interrupts ['on'|'off']"); + return retval; } + +int handle_cortex_m3_mask_interrupts_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +{ + target_t *target = get_current_target(cmd_ctx); + armv7m_common_t *armv7m = target->arch_info; + cortex_m3_common_t *cortex_m3 = armv7m->arch_info; + + if (target->state != TARGET_HALTED) + { + command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); + return ERROR_OK; + } + + if (argc > 0) + { + if (!strcmp(args[0], "on")) + { + cortex_m3_write_debug_halt_mask(target, C_HALT|C_MASKINTS, 0); + } + else if (!strcmp(args[0], "off")) + { + cortex_m3_write_debug_halt_mask(target, C_HALT, C_MASKINTS); + } + else + { + command_print(cmd_ctx, "usage: cortex_m3 maskisr ['on'|'off']"); + } + } + + command_print(cmd_ctx, "cortex_m3 interrupt mask %s", + (cortex_m3->dcb_dhcsr & C_MASKINTS) ? "on" : "off"); + + return ERROR_OK; +} |