diff options
| -rw-r--r-- | src/target/Makefile.am | 5 | ||||
| -rw-r--r-- | src/target/event/at91eb40a_reset.script (renamed from src/target/event/at91eb40a_reset.cfg) | 0 | ||||
| -rw-r--r-- | src/target/event/at91r40008_reset.script | 7 | ||||
| -rw-r--r-- | src/target/event/sam7s256_reset.script | 17 | ||||
| -rw-r--r-- | src/target/event/sam7x256_reset.script | 17 | ||||
| -rw-r--r-- | src/target/target/at91eb40a.cfg | 2 | ||||
| -rw-r--r-- | src/target/target/at91r40008.cfg | 22 | ||||
| -rw-r--r-- | src/target/target/lpc2148.cfg | 19 | ||||
| -rw-r--r-- | src/target/target/lpc2294.cfg | 20 | ||||
| -rw-r--r-- | src/target/target/sam7s256.cfg | 21 | ||||
| -rw-r--r-- | src/target/target/sam7x256.cfg | 21 | ||||
| -rw-r--r-- | src/target/target/str710.cfg | 21 | ||||
| -rw-r--r-- | src/target/target/str912.cfg | 26 |
13 files changed, 196 insertions, 2 deletions
diff --git a/src/target/Makefile.am b/src/target/Makefile.am index acda7223..f29091d1 100644 --- a/src/target/Makefile.am +++ b/src/target/Makefile.am @@ -19,6 +19,9 @@ noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7t arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h cortex_swjdp.h \ etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h -nobase_dist_pkglib_DATA = xscale/debug_handler.bin event/at91eb40a_reset.cfg target/at91eb40a.cfg +nobase_dist_pkglib_DATA = xscale/debug_handler.bin event/at91eb40a_reset.script target/at91eb40a.cfg \ + event/at91r40008_reset.script event/sam7s256_reset.script event/sam7x256_reset.script \ + target/at91r40008.cfg target/lpc2148.cfg target/lpc2294.cfg target/sam7s256.cfg \ + target/sam7x256.cfg target/str710.cfg target/str912.cfg diff --git a/src/target/event/at91eb40a_reset.cfg b/src/target/event/at91eb40a_reset.script index c6da2ef1..c6da2ef1 100644 --- a/src/target/event/at91eb40a_reset.cfg +++ b/src/target/event/at91eb40a_reset.script diff --git a/src/target/event/at91r40008_reset.script b/src/target/event/at91r40008_reset.script new file mode 100644 index 00000000..4cda1c58 --- /dev/null +++ b/src/target/event/at91r40008_reset.script @@ -0,0 +1,7 @@ +wait_halt +sleep 10 +poll +# Ethernut 3 remapping is required to access external flash memory. +mww 0xffe00000 0x1000213d +mww 0xffe00004 0x20003e3d +mww 0xffe00020 0x00000001 diff --git a/src/target/event/sam7s256_reset.script b/src/target/event/sam7s256_reset.script new file mode 100644 index 00000000..456341d6 --- /dev/null +++ b/src/target/event/sam7s256_reset.script @@ -0,0 +1,17 @@ +# +# Init - taken form the script openocd_at91sam7_ecr.script +# +# I take this script from the following page: +# +# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html +# +mww 0xfffffd44 0x00008000 # disable watchdog +mww 0xfffffd08 0xa5000001 # enable user reset +mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator +sleep 10 +mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz +sleep 10 +mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz +sleep 10 +mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) +sleep 100 diff --git a/src/target/event/sam7x256_reset.script b/src/target/event/sam7x256_reset.script new file mode 100644 index 00000000..456341d6 --- /dev/null +++ b/src/target/event/sam7x256_reset.script @@ -0,0 +1,17 @@ +# +# Init - taken form the script openocd_at91sam7_ecr.script +# +# I take this script from the following page: +# +# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html +# +mww 0xfffffd44 0x00008000 # disable watchdog +mww 0xfffffd08 0xa5000001 # enable user reset +mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator +sleep 10 +mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz +sleep 10 +mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz +sleep 10 +mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) +sleep 100 diff --git a/src/target/target/at91eb40a.cfg b/src/target/target/at91eb40a.cfg index 7a3a620a..3d5eb14e 100644 --- a/src/target/target/at91eb40a.cfg +++ b/src/target/target/at91eb40a.cfg @@ -22,7 +22,7 @@ arm7 fast_memory_access enable arm7_9 dcc_downloads enable # OpenOCD does not have a flash driver for for AT91FR40162S -target_script 0 reset event/at91eb40a_reset.cfg +target_script 0 reset event/at91eb40a_reset.script # required for usable performance. Used for lots of # other things than flash programming. diff --git a/src/target/target/at91r40008.cfg b/src/target/target/at91r40008.cfg new file mode 100644 index 00000000..eaf9ab4e --- /dev/null +++ b/src/target/target/at91r40008.cfg @@ -0,0 +1,22 @@ +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config srst_only + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target <type> <startup mode> +#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm7tdmi little run_and_init 0 arm7tdmi +run_and_halt_time 0 30 + +target_script 0 reset event/at91r40008_reset.script + +working_area 0 0x3C000 0x4000 nobackup +flash bank cfi 0x10000000 0x400000 2 2 0 + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/src/target/target/lpc2148.cfg b/src/target/target/lpc2148.cfg new file mode 100644 index 00000000..61cca4ad --- /dev/null +++ b/src/target/target/lpc2148.cfg @@ -0,0 +1,19 @@ +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst srst_pulls_trst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target <type> <startup mode> +#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4 +run_and_halt_time 0 30 + +working_area 0 0x40000000 0x4000 nobackup + +#flash bank lpc2000 <base> <size> 0 0 <target#> <variant> +flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/src/target/target/lpc2294.cfg b/src/target/target/lpc2294.cfg new file mode 100644 index 00000000..5076ccc4 --- /dev/null +++ b/src/target/target/lpc2294.cfg @@ -0,0 +1,20 @@ +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst srst_pulls_trst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target <type> <startup mode> +#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4 +run_and_halt_time 0 30 + +working_area 0 0x40000000 0x4000 nobackup + +#flash configuration +#flash bank lpc2000 <base> <size> 0 0 <target#> <variant> +flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/src/target/target/sam7s256.cfg b/src/target/target/sam7s256.cfg new file mode 100644 index 00000000..2906d19c --- /dev/null +++ b/src/target/target/sam7s256.cfg @@ -0,0 +1,21 @@ +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config srst_only srst_pulls_trst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target <type> <startup mode> +#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm7tdmi little run_and_init 0 arm7tdmi +run_and_halt_time 0 30 + +target_script 0 reset .\prj\sam7s256_reset.script + +working_area 0 0x00200000 0x4000 nobackup + +#flash bank <driver> <base> <size> <chip_width> <bus_width> +flash bank at91sam7 0 0 0 0 0 + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/src/target/target/sam7x256.cfg b/src/target/target/sam7x256.cfg new file mode 100644 index 00000000..cb289824 --- /dev/null +++ b/src/target/target/sam7x256.cfg @@ -0,0 +1,21 @@ +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config srst_only srst_pulls_trst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target <type> <startup mode> +#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm7tdmi little run_and_init 0 arm7tdmi +run_and_halt_time 0 30 + +target_script 0 reset event/sam7x256_reset.script + +working_area 0 0x00200000 0x4000 nobackup + +#flash bank <driver> <base> <size> <chip_width> <bus_width> +flash bank at91sam7 0 0 0 0 0 + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/src/target/target/str710.cfg b/src/target/target/str710.cfg new file mode 100644 index 00000000..ebf6b9b2 --- /dev/null +++ b/src/target/target/str710.cfg @@ -0,0 +1,21 @@ +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst srst_pulls_trst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target <type> <startup mode> +#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm7tdmi little run_and_halt 0 arm7tdmi +run_and_halt_time 0 30 + +target_script 0 gdb_program_config event/str710_program.script + +working_area 0 0x2000C000 0x4000 nobackup + +#flash bank str7x <base> <size> 0 0 <target#> <variant> +flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/src/target/target/str912.cfg b/src/target/target/str912.cfg new file mode 100644 index 00000000..71aa062d --- /dev/null +++ b/src/target/target/str912.cfg @@ -0,0 +1,26 @@ +jtag_nsrst_delay 100 +jtag_ntrst_delay 100 + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 8 0x1 0x1 0xfe +jtag_device 4 0x1 0xf 0xe +jtag_device 5 0x1 0x1 0x1e + +#target <type> <startup mode> +#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm966e little reset_halt 1 arm966e +run_and_halt_time 0 30 + +target_script 0 gdb_program_config event/str912_program.script + +working_area 0 0x50000000 16384 nobackup + +#flash bank str7x <base> <size> 0 0 <target#> <variant> +flash bank str9x 0x00000000 0x00080000 0 0 0 + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger |