diff options
-rw-r--r-- | README | 5 | ||||
-rw-r--r-- | src/flash/at91sam7.c | 51 | ||||
-rw-r--r-- | src/flash/at91sam7.h | 9 | ||||
-rw-r--r-- | src/jtag/ft2232.c | 77 |
4 files changed, 127 insertions, 15 deletions
@@ -43,6 +43,11 @@ The Amontec JTAGkey offers support for a wide variety of target voltages from 1.4V to 5V. It also allows the JTAG lines and reset signals to be tri-stated, allowing easy interfacing with a wide variety of targets. +* Amontec JTAGkey-Tiny: www.amontec.com +The Amontec JTAGkey offers support for a wide variety of target voltages from +2.8V to 5V. It also allows the reset signals to be tri-stated, allowing easy +interfacing with a wide variety of targets. + * Olimex ARM-USB-OCD: www.olimex.com The Olimex ARM-USB-OCD offers support for a wide vriety of target voltages from 2.0V to 5V. It also allows targets to be powered from the ARM-USB-OCD and diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c index a8e390a9..84916829 100644 --- a/src/flash/at91sam7.c +++ b/src/flash/at91sam7.c @@ -63,7 +63,7 @@ int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size); u32 at91sam7_get_flash_status(flash_bank_t *bank); void at91sam7_set_flash_mode(flash_bank_t *bank,int mode); -u8 at91sam7_wait_status_busy(flash_bank_t *bank, int timeout); +u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout); int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); flash_driver_t at91sam7_flash = @@ -195,7 +195,7 @@ void at91sam7_read_clock_info(flash_bank_t *bank) at91sam7_info->mck_freq = tmp >> ((mckr & PMC_MCKR_PRES) >> 2); /* Forget old flash timing */ - at91sam7_set_flash_mode(bank,0); + at91sam7_set_flash_mode(bank,FMR_TIMING_NONE); } /* Setup the timimg registers for nvbits or normal flash */ @@ -208,10 +208,20 @@ void at91sam7_set_flash_mode(flash_bank_t *bank,int mode) if (mode && (mode != at91sam7_info->flashmode)) { /* Always round up (ceil) */ - if (mode==1) - /* main clocks in 1uS */ - fmcn = (at91sam7_info->mck_freq/1000000ul)+1; - else if (mode==2) + if (mode==FMR_TIMING_NVBITS) + { + if (at91sam7_info->cidr_arch == 0x60) + { + /* AT91SAM7A3 uses master clocks in 100 ns */ + fmcn = (at91sam7_info->mck_freq/10000000ul)+1; + } + else + { + /* master clocks in 1uS for ARCH 0x7 types */ + fmcn = (at91sam7_info->mck_freq/1000000ul)+1; + } + } + else if (mode==FMR_TIMING_FLASH) /* main clocks in 1.5uS */ fmcn = (at91sam7_info->mck_freq/666666ul)+1; @@ -230,11 +240,11 @@ void at91sam7_set_flash_mode(flash_bank_t *bank,int mode) at91sam7_info->flashmode = mode; } -u8 at91sam7_wait_status_busy(flash_bank_t *bank, int timeout) +u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout) { u32 status; - while ((!((status = at91sam7_get_flash_status(bank)) & 0x01)) && (timeout-- > 0)) + while ((!((status = at91sam7_get_flash_status(bank)) & waitbits)) && (timeout-- > 0)) { DEBUG("status: 0x%x", status); usleep(1000); @@ -256,6 +266,7 @@ u8 at91sam7_wait_status_busy(flash_bank_t *bank, int timeout) return status; } + /* Send one command to the AT91SAM flash controller */ int at91sam7_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen) { @@ -267,8 +278,18 @@ int at91sam7_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen) target_write_u32(target, MC_FCR, fcr); DEBUG("Flash command: 0x%x, pagenumber:", fcr, pagen); - if (at91sam7_wait_status_busy(bank, 10)&0x0C) + if ((at91sam7_info->cidr_arch == 0x60)&&((cmd==SLB)|(cmd==CLB))) { + /* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */ + if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C) + { + return ERROR_FLASH_OPERATION_FAILED; + } + return ERROR_OK; + } + + if (at91sam7_wait_status_busy(bank, MC_FSR_FRDY, 10)&0x0C) + { return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; @@ -422,7 +443,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) at91sam7_info->target_name = "AT91SAM7A3"; at91sam7_info->num_lockbits = 16; at91sam7_info->pagesize = 256; - at91sam7_info->pages_in_lockregion = 64; + at91sam7_info->pages_in_lockregion = 16; at91sam7_info->num_pages = 16*64; } return ERROR_OK; @@ -526,7 +547,7 @@ int at91sam7_erase(struct flash_bank_s *bank, int first, int last) /* Configure the flash controller timing */ at91sam7_read_clock_info(bank); - at91sam7_set_flash_mode(bank,2); + at91sam7_set_flash_mode(bank,FMR_TIMING_FLASH); if ((first == 0) && (last == (at91sam7_info->num_lockbits-1))) { @@ -568,7 +589,7 @@ int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last) /* Configure the flash controller timing */ at91sam7_read_clock_info(bank); - at91sam7_set_flash_mode(bank,1); + at91sam7_set_flash_mode(bank,FMR_TIMING_NVBITS); for (lockregion=first;lockregion<=last;lockregion++) { @@ -638,7 +659,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* Configure the flash controller timing */ at91sam7_read_clock_info(bank); - at91sam7_set_flash_mode(bank,2); + at91sam7_set_flash_mode(bank,FMR_TIMING_FLASH); for (pagen=first_page; pagen<last_page; pagen++) { if (bytes_remaining<dst_min_alignment) @@ -700,7 +721,7 @@ int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size) return ERROR_FLASH_OPERATION_FAILED; } - printed = snprintf(buf, buf_size, "\nat91sam7 information:\n"); + printed = snprintf(buf, buf_size, "\nat91sam7 information: Chip is %s\n",at91sam7_info->target_name); buf += printed; buf_size -= printed; @@ -800,7 +821,7 @@ int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, /* Configure the flash controller timing */ at91sam7_read_clock_info(bank); - at91sam7_set_flash_mode(bank,1); + at91sam7_set_flash_mode(bank,FMR_TIMING_NVBITS); if (at91sam7_flash_command(bank, flashcmd, (u16)(bit)) != ERROR_OK) { diff --git a/src/flash/at91sam7.h b/src/flash/at91sam7.h index e2412f8c..0bb8f439 100644 --- a/src/flash/at91sam7.h +++ b/src/flash/at91sam7.h @@ -86,7 +86,16 @@ typedef struct at91sam7_flash_bank_s #define CGPB 0x0D #define SSB 0x0F +/* MC_FSR bit definitions */ +#define MC_FSR_FRDY 1 +#define MC_FSR_EOL 2 + /* AT91SAM7 constants */ #define RC_FREQ 32000 +/* FLASH_TIMING_MODES */ +#define FMR_TIMING_NONE 0 +#define FMR_TIMING_NVBITS 1 +#define FMR_TIMING_FLASH 2 + #endif /* AT91SAM7_H */ diff --git a/src/jtag/ft2232.c b/src/jtag/ft2232.c index c1973a3c..6bb4be93 100644 --- a/src/jtag/ft2232.c +++ b/src/jtag/ft2232.c @@ -90,11 +90,13 @@ typedef struct ft2232_layout_s int usbjtag_init(void); int jtagkey_init(void); int olimex_jtag_init(void); +int m5960_init(void); /* reset procedures for supported layouts */ void usbjtag_reset(int trst, int srst); void jtagkey_reset(int trst, int srst); void olimex_jtag_reset(int trst, int srst); +void m5960_reset(int trst, int srst); /* blink procedures for layouts that support a blinking led */ void olimex_jtag_blink(void); @@ -106,6 +108,7 @@ ft2232_layout_t ft2232_layouts[] = {"jtagkey_prototype_v1", jtagkey_init, jtagkey_reset, NULL}, {"signalyzer", usbjtag_init, usbjtag_reset, NULL}, {"olimex-jtag", olimex_jtag_init, olimex_jtag_reset, olimex_jtag_blink}, + {"m5960", m5960_init, m5960_reset, NULL}, {NULL, NULL, NULL}, }; @@ -718,6 +721,34 @@ void olimex_jtag_reset(int trst, int srst) DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction); } +void m5960_reset(int trst, int srst) +{ + if (trst == 1) + { + cur_state = TAP_TLR; + low_output &= ~nTRST; + } + else if (trst == 0) + { + low_output |= nTRST; + } + + if (srst == 1) + { + low_output |= nSRST; + } + else if (srst == 0) + { + low_output &= ~nSRST; + } + + /* command "set data bits low byte" */ + BUFFER_ADD = 0x80; + BUFFER_ADD = low_output; + BUFFER_ADD = low_direction; + DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction); +} + int ft2232_execute_queue() { jtag_command_t *cmd = jtag_command_queue; /* currently processed command */ @@ -1304,6 +1335,52 @@ int olimex_jtag_init(void) return ERROR_OK; } +int m5960_init(void) +{ + u8 buf[3]; + u32 bytes_written; + + low_output = 0x18; + low_direction = 0xfb; + + /* initialize low byte for jtag */ + buf[0] = 0x80; /* command "set data bits low byte" */ + buf[1] = low_output; /* value (TMS=1,TCK=0, TDI=0, nOE=0) */ + buf[2] = low_direction; /* dir (output=1), TCK/TDI/TMS=out, TDO=in, nOE[12]=out, n[ST]srst=out */ + DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]); + + if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3)) + { + ERROR("couldn't initialize FT2232 with 'm5960' layout"); + return ERROR_JTAG_INIT_FAILED; + } + + nTRST = 0x10; + nTRSTnOE = 0x0; /* not output enable for nTRST */ + nSRST = 0x20; + nSRSTnOE = 0x00; /* no output enable for nSRST */ + + high_output = 0x00; + high_direction = 0x0c; + + /* turn red LED1 on, LED2 off */ + high_output |= 0x08; + + /* initialize high port */ + buf[0] = 0x82; /* command "set data bits high byte" */ + buf[1] = high_output; /* value */ + buf[2] = high_direction; /* all outputs (xRST and xRSTnOE) */ + DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]); + + if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3)) + { + ERROR("couldn't initialize FT2232 with 'm5960' layout"); + return ERROR_JTAG_INIT_FAILED; + } + + return ERROR_OK; +} + void olimex_jtag_blink(void) { /* Olimex ARM-USB-OCD has a LED connected to ACBUS3 |