diff options
| -rw-r--r-- | tcl/target/lpc1768.cfg | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg index 88827fa1..ff92e4a7 100644 --- a/tcl/target/lpc1768.cfg +++ b/tcl/target/lpc1768.cfg @@ -50,8 +50,12 @@ flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME \ # JTAG clock should be CCLK/6 (unless using adaptive clocking) # CCLK is 4 MHz after reset, and until board-specific code (like # a reset-init handler) speeds it up. -jtag_rclk [ expr 4000 / 6 ] -$_TARGETNAME configure -event reset-start { jtag_rclk [ expr 4000 / 6] } +# +# Although rclk "appears to work", it turns out that this yields +# 4MHz whereas the "correct" rate is CCLK/6, which is not what +# you get with rclk. +jtag_khz [ expr 4000 / 6 ] + $_TARGETNAME configure -event reset-init { |