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Diffstat (limited to 'doc/openocd.texi')
| -rw-r--r-- | doc/openocd.texi | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index ea23bf72..bf7402d4 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5978,13 +5978,21 @@ is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache). @deffn Command {arm920t cp15} regnum [value] Display cp15 register @var{regnum}; else if a @var{value} is provided, that value is written to that register. +This uses "physical access" and the register number is as +shown in bits 38..33 of table 9-9 in the ARM920T TRM. +(Not all registers can be written.) @end deffn @deffn Command {arm920t cp15i} opcode [value [address]] -Interpreted access using cp15 @var{opcode}. +@emph{DEPRECATED -- avoid using this. +Use the @command{arm mrc} or @command{arm mcr} commands instead.} + +Interpreted access using ARM instruction @var{opcode}, which should +be the value of either an MRC or MCR instruction +(as shown tables 9-11, 9-12, and 9-13 in the ARM920T TRM). If no @var{value} is provided, the result is displayed. Else if that value is written using the specified @var{address}, -or using zero if no other address is not provided. +or using zero if no other address is provided. @end deffn @deffn Command {arm920t read_cache} filename |