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Diffstat (limited to 'src/flash/at91sam7.h')
| -rw-r--r-- | src/flash/at91sam7.h | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/src/flash/at91sam7.h b/src/flash/at91sam7.h new file mode 100644 index 00000000..8f9e3db7 --- /dev/null +++ b/src/flash/at91sam7.h @@ -0,0 +1,83 @@ +/*************************************************************************** + * Copyright (C) 2006 by Magnus Lundin * + * lundinªmlu.mine.nu * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ +#ifndef AT91SAM7_H +#define AT91SAM7_H + +#include "flash.h" +#include "target.h" + +typedef struct at91sam7_flash_bank_s +{ + struct target_s *target; + u32 working_area; + u32 working_area_size; + + /* chip id register */ + u32 cidr; + u16 cidr_ext; + u16 cidr_nvptyp; + u16 cidr_arch; + u16 cidr_sramsiz; + u16 cidr_nvpsiz; + u16 cidr_nvpsiz2; + u16 cidr_eproc; + u16 cidr_version; + + /* flash geometry */ + u16 num_pages; + u16 pagesize; + u16 pages_in_lockregion; + u8 num_erase_regions; + u32 *erase_region_info; + + /* nv memory bits */ + u16 num_lockbits; + u16 lockbits; + u16 num_nvmbits; + u16 nvmbits; + u8 securitybit; + u8 flashmode; /* 0: not init, 1: fmcn for nvbits (1uS), 2: fmcn for flash (1.5uS) */ + + /* main clock status */ + u8 mainrdy; + u16 mainf; + u16 usec_clocks; + +} at91sam7_flash_bank_t; + +/* AT91SAM7 control registers */ +#define DBGU_CIDR 0xFFFFF240 +#define CKGR_MCFR 0xFFFFFC24 +#define MC_FMR 0xFFFFFF60 +#define MC_FCR 0xFFFFFF64 +#define MC_FSR 0xFFFFFF68 + +/* Flash Controller Commands */ +#define WP 0x01 +#define SLB 0x02 +#define WPL 0x03 +#define CLB 0x04 +#define EA 0x08 +#define SGPB 0x0B +#define CGPB 0x0D +#define SSB 0x0F + + +#endif /* AT91SAM7_H */ |