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-rw-r--r--src/target/arm720t.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index 4e9e6fd7..a5916aae 100644
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -319,7 +319,7 @@ int arm720t_arch_state(struct target_s *target)
"cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
"MMU: %s, Cache: %s",
armv4_5_state_strings[armv4_5->core_state],
- Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason )->name ,
+ Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name ,
armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),
buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),