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Diffstat (limited to 'src/target/armv7m.c')
-rw-r--r--src/target/armv7m.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 2258967a..d4c6d357 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -303,14 +303,14 @@ static int armv7m_run_and_wait(struct target_s *target, u32 entry_point, int tim
u32 pc;
int retval;
/* This code relies on the target specific resume() and poll()->debug_entry()
- sequence to write register values to the processor and the read them back */
+ * sequence to write register values to the processor and the read them back */
if((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK)
{
return retval;
}
retval = target_wait_state(target, TARGET_HALTED, timeout_ms);
- // If the target fails to halt due to the breakpoint, force a halt
+ /* If the target fails to halt due to the breakpoint, force a halt */
if (retval != ERROR_OK || target->state != TARGET_HALTED)
{
if ((retval=target_halt(target))!=ERROR_OK)
@@ -322,7 +322,6 @@ static int armv7m_run_and_wait(struct target_s *target, u32 entry_point, int tim
return ERROR_TARGET_TIMEOUT;
}
-
armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
if (pc != exit_point)
{