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Diffstat (limited to 'src/target/cortex_a8.c')
-rw-r--r--src/target/cortex_a8.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 46e2e717..f6f13cfc 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -138,8 +138,8 @@ int cortex_a8_init_debug_access(target_t *target)
/* Clear Sticky Power Down status Bit in PRSR to enable access to
the registers in the Core Power Domain */
retval = mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_PRSR, &dummy);
- /* Enabling of instruction execution in debug mode is done in debug_entry code */
-
+ /* Enabling of instruction execution in debug mode is done in debug_entry code */
+
return retval;
}
@@ -1374,7 +1374,7 @@ int cortex_a8_examine(struct target_s *target)
uint32_t didr, ctypr, ttypr, cpuid;
LOG_DEBUG("TODO");
-
+
/* Here we shall insert a proper ROM Table scan */
armv7a->debug_base = OMAP3530_DEBUG_BASE;
@@ -1451,7 +1451,7 @@ int cortex_a8_examine(struct target_s *target)
/* Configure core debug access */
cortex_a8_init_debug_access(target);
-
+
target->type->examined = 1;
return retval;