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-rw-r--r--src/target/event/str912_reset.script17
-rw-r--r--src/target/target/stm32.cfg2
-rw-r--r--src/target/target/str710.cfg1
-rw-r--r--src/target/target/str912.cfg3
4 files changed, 4 insertions, 19 deletions
diff --git a/src/target/event/str912_reset.script b/src/target/event/str912_reset.script
index c3d68104..33c62047 100644
--- a/src/target/event/str912_reset.script
+++ b/src/target/event/str912_reset.script
@@ -1,22 +1,5 @@
-mww 0xFFFFFD44, 0x00008000 #Disable watchdog
-mww 0xFFFFFC20, 0x00000601 #Enable Main oscillator
-sleep 20
-mww 0xFFFFFC30, 0x00000001 #Switch master clock to CPU clock, write 1 to PMC_MCKR
-sleep 20
-
-
-# -- Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000,
-# when the bank 0 is the boot bank, then enable the Bank 1. */
-
-mww 0x54000000, 0x4 #BOOT BANK Size = (2^4) * 32 = 512KB
-mww 0x54000004, 0x2 #NON BOOT BANK Size = (2^2) * 8 = 32KB
-mww 0x5400000C, 0x0 #BOOT BANK Address = 0x0
-mww 0x54000010, 0x20000 #NON BOOT BANK Address = 0x80000
-mww 0x54000018, 0x18 #Enable CS on both banks
-
# -- Enable 96K RAM */
mww 0x5C002034, 0x0191 # PFQBC enabled / DTCM & AHB wait-states disabled
-arm966e cp15 15, 0x60000 #Set bits 17-18 (DTCM/ITCM order bits) of the Core Configuration Control Register
str9x flash_config 0 4 2 0 0x80000
flash protect 0 0 7 off
diff --git a/src/target/target/stm32.cfg b/src/target/target/stm32.cfg
index 0cffeb1d..8a93087d 100644
--- a/src/target/target/stm32.cfg
+++ b/src/target/target/stm32.cfg
@@ -17,7 +17,7 @@ run_and_halt_time 0 30
working_area 0 0x20000000 16384 nobackup
#flash bank str7x <base> <size> 0 0 <target#> <variant>
-flash bank stm32x 0x00000000 0x00000000 0 0 0
+flash bank stm32x 0 0 0 0 0
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
diff --git a/src/target/target/str710.cfg b/src/target/target/str710.cfg
index 2d27624d..18a47950 100644
--- a/src/target/target/str710.cfg
+++ b/src/target/target/str710.cfg
@@ -19,6 +19,7 @@ working_area 0 0x2000C000 0x4000 nobackup
#flash bank str7x <base> <size> 0 0 <target#> <variant>
flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
+flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
diff --git a/src/target/target/str912.cfg b/src/target/target/str912.cfg
index c749cd2c..e827cdf0 100644
--- a/src/target/target/str912.cfg
+++ b/src/target/target/str912.cfg
@@ -19,8 +19,9 @@ target_script 0 reset event/str912_reset.script
working_area 0 0x50000000 16384 nobackup
-#flash bank str7x <base> <size> 0 0 <target#> <variant>
+#flash bank str9x <base> <size> 0 0 <target#> <variant>
flash bank str9x 0x00000000 0x00080000 0 0 0
+flash bank str9x 0x00080000 0x00008000 0 0 0
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger