diff options
Diffstat (limited to 'src/tcl/target/lm3s3748.cfg')
| -rw-r--r-- | src/tcl/target/lm3s3748.cfg | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/src/tcl/target/lm3s3748.cfg b/src/tcl/target/lm3s3748.cfg new file mode 100644 index 00000000..7321cb8a --- /dev/null +++ b/src/tcl/target/lm3s3748.cfg @@ -0,0 +1,49 @@ +# Script for luminary lm3s3748 +# +# NB! work in progress! Duplicated from lm3s811.cfg, but does +# it need modification?? + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lm3s3748 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + # this defaults to a little endian + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + # force an error till we get a good number + set _CPUTAPID 0x3ba00477 +} + +# RCLK +jtag_khz 500 + +jtag_nsrst_delay 100 +jtag_ntrst_delay 100 + +#lm3s3748 Evaluation Board has only srst +reset_config srst_only + +#jtag scan chain +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID + + +# the luminary variant causes a software reset rather than asserting SRST +# this stops the debug registers from being cleared +# this will be fixed in later revisions of silicon +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant lm3s + +# 8k working area at base of ram +$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x2000 -work-area-backup 0 + +#flash configuration +flash bank stellaris 0 0 0 0 0 |