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-rw-r--r--src/target/target/str9comstick.cfg25
1 files changed, 24 insertions, 1 deletions
diff --git a/src/target/target/str9comstick.cfg b/src/target/target/str9comstick.cfg
index 2a2366e5..a75b4760 100644
--- a/src/target/target/str9comstick.cfg
+++ b/src/target/target/str9comstick.cfg
@@ -10,6 +10,17 @@ reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME str912
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
if { [info exists FLASHTAPID ] } {
set _FLASHTAPID $FLASHTAPID
@@ -25,7 +36,6 @@ if { [info exists CPUTAPID ] } {
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xf -expected-id $_CPUTAPID
-
if { [info exists BSTAPID ] } {
set _BSTAPID $BSTAPID
} else {
@@ -36,7 +46,20 @@ jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
+$_TARGETNAME configure -event reset-init {
+ # We can increase speed now that we know the target is halted.
+ #jtag_rclk 3000
+
+ # -- Enable 96K RAM
+ # PFQBC enabled / DTCM & AHB wait-states disabled
+ mww 0x5C002034 0x0191
+
+ str9x flash_config 0 4 2 0 0x80000
+ flash protect 0 0 7 off
+}
+
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str9x 0x00000000 0x00080000 0 0 0
+flash bank str9x 0x00080000 0x00008000 0 0 0