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-rw-r--r--tcl/board/uptech_2410.cfg65
1 files changed, 65 insertions, 0 deletions
diff --git a/tcl/board/uptech_2410.cfg b/tcl/board/uptech_2410.cfg
new file mode 100644
index 00000000..950f2a7c
--- /dev/null
+++ b/tcl/board/uptech_2410.cfg
@@ -0,0 +1,65 @@
+# Target Configuration for the Uptech 2410 board.
+# This configuration hould also work on smdk2410, but I havn't tested it yet.
+# Author: xionglingfeng@Gmail.com
+
+source [find target/samsung_s3c2410.cfg]
+
+$_TARGETNAME configure -event reset-init { uptech2410_init }
+$_TARGETNAME configure -event gdb-attach { reset init }
+
+proc init_pll_sdram { } {
+ #echo "---------- Initializing PLL and SDRAM ---------"
+ #watchdog timer disable
+ mww phys 0x53000000 0x00000000
+
+ #disable all interrupts
+ mww phys 0x4a000008 0xffffffff
+
+ #disable all sub-interrupts
+ mww phys 0x4a00001c 0x000007ff
+
+ #clear all source pending bits
+ mww phys 0x4a000000 0xffffffff
+
+ #clear all sub-source pending bits
+ mww phys 0x4a000018 0x000007ff
+
+ #clear interrupt pending bit
+ mww phys 0x4a000010 0xffffffff
+
+ #PLL locktime counter
+ mww phys 0x4c000000 0x00ffffff
+
+ #Fin=12MHz Fout=202.8MHz
+ #mww phys 0x4c000004 0x000a1031
+
+ #FCLK:HCLK:PCLK = 1:2:4
+ mww phys 0x4c000014 0x00000003
+
+
+ mww phys 0x48000000 0x11111110
+ mww phys 0x48000004 0x00007FFC
+ mww phys 0x48000008 0x00007FFC
+ mww phys 0x4800000c 0x00000700
+ mww phys 0x48000010 0x00000700
+ mww phys 0x48000014 0x00002E50
+ mww phys 0x48000018 0x00002E50
+ mww phys 0x4800001c 0x00018005
+ mww phys 0x48000020 0x00018005
+ mww phys 0x48000024 0x008c04e9
+ mww phys 0x48000028 0x000000b2
+ mww phys 0x4800002c 0x00000030
+ mww phys 0x48000030 0x00000030
+}
+
+proc uptech2410_init { } {
+ init_pll_sdram
+ #echo "---------- Probing Nand flash ----------"
+ nand probe 0
+ #echo "---------- Enable some functions ----------"
+}
+
+set _NANDNAME $_CHIPNAME.nand
+nand device $_NANDNAME s3c2410 $_TARGETNAME
+
+