diff options
Diffstat (limited to 'tcl/target/stellaris.cfg')
| -rw-r--r-- | tcl/target/stellaris.cfg | 43 |
1 files changed, 37 insertions, 6 deletions
diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg index 4235f910..6ba5f14a 100644 --- a/tcl/target/stellaris.cfg +++ b/tcl/target/stellaris.cfg @@ -21,18 +21,15 @@ if { [info exists CPUTAPID ] } { if { [info exists WORKAREASIZE ] } { set _WORKAREASIZE $WORKAREASIZE } else { + # default to 8K working area set _WORKAREASIZE 0x2000 } jtag newtap $_CHIPNAME cpu -irlen 4 -irmask 0xf \ -expected-id $_CPUTAPID -ignore-version -# The "lm3s" variant uses a software reset rather than SRST. -# This stops the debug registers from being cleared; it works -# around an erratum which should be fixed in later silicon. set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu \ - -variant lm3s +target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu # 8K working area at base of ram, not backed up # @@ -48,7 +45,41 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE # configures and enables the PLL. Or you might need to decrease # this, if you're using a slower clock. adapter_khz 500 -$_TARGETNAME configure -event reset-start {adapter_khz 500} + +# mrw: "memory read word", returns value of $reg +proc mrw {reg} { + set value "" + mem2array value 32 $reg 1 + return $value(0) +} + +$_TARGETNAME configure -event reset-start { + adapter_khz 500 + + # + # When nRST is asserted on most Stellaris devices, it clears some of + # the debug state. The ARMv7M and Cortex-M3 TRMs say that's wrong; + # and OpenOCD depends on those TRMs. So we won't use SRST on those + # chips. (Only power-on reset should affect debug state, beyond a + # few specified bits; not the chip's nRST input, wired to SRST.) + # + # REVISIT current errata specs don't seem to cover this issue. + # Do we have more details than this email? + # https://lists.berlios.de/pipermail + # /openocd-development/2008-August/003065.html + # + + set device_class [expr (([mrw 0x400fe000] >> 16) & 0xff)] + if {$device_class == 0 || $device_class == 1 || $device_class == 3} { + # Sandstorm, Fury and DustDevil are able to use NVIC SYSRESETREQ + cortex_m3 reset_config systesetreq + } else { + # Tempest and newer default to using NVIC VECTRESET + # this does mean a reset-init event handler is required to reset + # any peripherals + cortex_m3 reset_config vectreset + } +} # flash configuration ... autodetects sizes, autoprobed flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME |