diff options
Diffstat (limited to 'tcl/target/ti_dm365.cfg')
| -rw-r--r-- | tcl/target/ti_dm365.cfg | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/tcl/target/ti_dm365.cfg b/tcl/target/ti_dm365.cfg index 3a17d1a8..e2d29bd5 100644 --- a/tcl/target/ti_dm365.cfg +++ b/tcl/target/ti_dm365.cfg @@ -7,16 +7,15 @@ if { [info exists CHIPNAME] } { set _CHIPNAME dm365 } -# -# For now, expect EMU0/EMU1 jumpered LOW (not TI's default) so ARM and ETB -# are enabled without making ICEpick route ARM and ETB into the JTAG chain. -# -# Also note: when running without RTCK before the PLLs are set up, you -# may need to slow the JTAG clock down quite a lot (under 2 MHz). -# +# TI boards default to EMU0/EMU1 *high* -- ARM and ETB are *disabled* +# after JTAG reset until ICEpick is used to route them in. +set EMU01 "-disable" + +# With EMU0/EMU1 jumpered *low* ARM and ETB are *enabled* without +# needing any ICEpick interaction. +#set EMU01 "-enable" + source [find target/icepick.cfg] -set EMU01 "-enable" -#set EMU01 "-disable" # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer if { [info exists ETB_TAPID ] } { @@ -46,6 +45,9 @@ if { [info exists JRC_TAPID ] } { } jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID +jtag configure $_CHIPNAME.jrc -event setup \ + "jtag tapenable $_CHIPNAME.etb; jtag tapenable $_CHIPNAME.arm" + ################ # various symbol definitions, to avoid hard-wiring addresses |