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-rw-r--r--tcl/target/lm3s1968.cfg15
-rw-r--r--tcl/target/lm3s3748.cfg12
-rw-r--r--tcl/target/lm3s6965.cfg21
-rw-r--r--tcl/target/lm3s811.cfg15
-rw-r--r--tcl/target/lm3s9b9x.cfg17
5 files changed, 21 insertions, 59 deletions
diff --git a/tcl/target/lm3s1968.cfg b/tcl/target/lm3s1968.cfg
index eebdcdc4..3f0cdfcf 100644
--- a/tcl/target/lm3s1968.cfg
+++ b/tcl/target/lm3s1968.cfg
@@ -6,13 +6,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lm3s1968
}
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- # this defaults to a little endian
- set _ENDIAN little
-}
-
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
@@ -26,10 +19,10 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUT
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant lm3s
+target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
-# 4k working area at base of ram
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x4000 -work-area-backup 0
+# 8k working area at base of ram, not backed up
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
#flash configuration
-flash bank stellaris 0 0 0 0 0
+flash bank stellaris 0 0 0 0 $_TARGETNAME
diff --git a/tcl/target/lm3s3748.cfg b/tcl/target/lm3s3748.cfg
index 47cf72ef..3fdbd798 100644
--- a/tcl/target/lm3s3748.cfg
+++ b/tcl/target/lm3s3748.cfg
@@ -6,13 +6,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lm3s3748
}
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- # this defaults to a little endian
- set _ENDIAN little
-}
-
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
@@ -26,11 +19,10 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUT
# parts (third generation, includes LM3S3748). It keeps the debug registers
# from being cleared, by using software reset not SRST; NOP on newer revs.
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN \
- -chain-position $_TARGETNAME -variant lm3s
+target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
# 8k working area at base of ram, not backed up
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
# flash configuration -- one bank of 128K
-flash bank stellaris 0 0 0 0 0
+flash bank stellaris 0 0 0 0 $_TARGETNAME
diff --git a/tcl/target/lm3s6965.cfg b/tcl/target/lm3s6965.cfg
index 27b104ff..c12b48d7 100644
--- a/tcl/target/lm3s6965.cfg
+++ b/tcl/target/lm3s6965.cfg
@@ -1,5 +1,4 @@
-# script for luminary lm3s6965
-
+# TI/Luminary Stellaris lm3s6965
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
@@ -7,17 +6,9 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lm3s6965
}
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- # this defaults to a little endian
- set _ENDIAN little
-}
-
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
- # force an error till we get a good number
set _CPUTAPID 0x3ba00477
}
@@ -36,11 +27,11 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUT
# the luminary variant causes a software reset rather than asserting SRST
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant lm3s
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
-# 4k working area at base of ram
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x4000 -work-area-backup 0
+# 8k working area at base of ram, not backed up
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
#flash configuration
-flash bank stellaris 0 0 0 0 0
+flash bank stellaris 0 0 0 0 $_TARGETNAME
diff --git a/tcl/target/lm3s811.cfg b/tcl/target/lm3s811.cfg
index 635e22e6..f9e29832 100644
--- a/tcl/target/lm3s811.cfg
+++ b/tcl/target/lm3s811.cfg
@@ -6,13 +6,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lm3s811
}
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- # this defaults to a little endian
- set _ENDIAN little
-}
-
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
@@ -26,10 +19,10 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUT
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant lm3s
+target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
-# 8k working area at base of ram
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x2000 -work-area-backup 0
+# 8k working area at base of ram, not backed up
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
#flash configuration
-flash bank stellaris 0 0 0 0 0
+flash bank stellaris 0 0 0 0 $_TARGETNAME
diff --git a/tcl/target/lm3s9b9x.cfg b/tcl/target/lm3s9b9x.cfg
index e5a5b504..56f492f6 100644
--- a/tcl/target/lm3s9b9x.cfg
+++ b/tcl/target/lm3s9b9x.cfg
@@ -11,17 +11,10 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lm3s9b9x
}
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- # this defaults to a little endian
- set _ENDIAN little
-}
-
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
- # forth generation Tempest device
+ # Fourth generation "Tempest" device
set _CPUTAPID 0x4ba00477
}
@@ -30,10 +23,10 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUT
#Cortex-M3 with Luminary lm3s variant
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant lm3s
+target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
-# 16k working area at base of ram
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x4000 -work-area-backup 0
+# 16k working area at base of ram, not backed up
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x4000
#flash configuration
-flash bank stellaris 0 0 0 0 0
+flash bank stellaris 0 0 0 0 $_TARGETNAME
generated by cgit v1.2.3 (git 2.46.0) at 2024-11-01 00:14:01 +0000