summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* Michael Hasselberg <mh@open-engineering.de> target configuration files for ↵oharboe2009-09-254-0/+355
| | | | | | Toshiba TX09 familiy git-svn-id: svn://svn.berlios.de/openocd/trunk@2756 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Try/catch scheme. Typed up the functionality and regression tested.oharboe2009-09-252-9/+100
| | | | | | Ready for discussion and tiny patches that tries out this scheme. git-svn-id: svn://svn.berlios.de/openocd/trunk@2755 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* When attaching GDB to OpenOCD, the target state is no longer affected.oharboe2009-09-242-28/+68
| | | | | | | | | Added gdb_sync feature that allows GDB to sync up to target state. Issue "monitor gdb_sync" and the next stepi, will return immediately with updated register values to GDB. git-svn-id: svn://svn.berlios.de/openocd/trunk@2754 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Start handling the (second) SRST stage of reset better:dbrownell2009-09-231-6/+11
| | | | | | | | | | | make sure that when there are two or more targets, their various pre/post event reports are correctly ordered. Previously, only the first target always saw its "pre" method before SRST was asserted or deasserted. git-svn-id: svn://svn.berlios.de/openocd/trunk@2753 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* When setting up an ETM, cache its ETM_CONFIG register. Thendbrownell2009-09-233-53/+216
| | | | | | | | | | | | | | | | | | | | | | | | | only expose the registers which are actually present. They could be missing for two basic reasons: - This version might not support them at all; e.g. ETMv1.1 doesn't have some control/status registers. (My sample of ARM9 boards shows all with ETMv1.3 support, FWIW.) - The configuration on this chip may not populate as many registers as possible; e.g. only two data value comparators instead of eight. Includes a bugfix in the "etm info" command: only one of the two registers is missing on older silicon, so show the first one before bailing. Update ETM usage docs to explain that those registers need to be written to configure what is traced, and that some ETM configs are not yet handled. Also, give some examples of the kinds of constrained trace which could be arranged. git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Start cleaning up ETM register handling. On one ARM926 ETM+ETBdbrownell2009-09-232-167/+176
| | | | | | | | | | | | | | | | | | | | | | system, removes 20 non-existent registers ... but still includes over 45 (!) ETM registers which don't even exist there ... - Integrate the various tables to get one struct per register - Get rid of needless per-register dynamic allocation - Double check list of registers: * Remove sixteen (!) non-registers for data comparators * Remove four registers that imply newer ETM than we support * Change some names to match current architecture specs - Handle more register info * some are write-only * some are read-only * record which versions have them, just in case - Reorganize the registers to facilitate removing the extras * group e.g. comparator/counter #N registers together * add and use lookup-by-ID git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Initial ETM cleanups. Most of these are cosmetic:dbrownell2009-09-232-83/+113
| | | | | | | | | | | | | | | | - Add a header comment - Line up the ETM context struct, pack it a bit - Remove unused context_id (this doesn't support ETMv2 yet) - Make most functions static - Remove unused string table and other needless lines of code - Correct "tracemode" helptext Also provide and use an etm_reg_lookup() to find entries in the ETM register cache. This will help cope with corrected contents of that cache, which doesn't include entires for non-existent registers. git-svn-id: svn://svn.berlios.de/openocd/trunk@2750 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Nico Coesel <ncoesel@dealogic.nl> fix warnings. . I'm wondering why theseoharboe2009-09-232-17/+17
| | | | | | | didn't turn up earlier. Is everyone still using gcc 3.x? Or is the x86 version of gcc 4.x much more relaxed? git-svn-id: svn://svn.berlios.de/openocd/trunk@2749 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - fix build issue under win32 (cygwin/msys) from svn r2746ntfreak2009-09-221-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2748 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - add missing svn props from previous commitntfreak2009-09-222-1953/+1953
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2747 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Make it easier to erase or protect through to the enddbrownell2009-09-222-42/+87
| | | | | | | | | | | | of a (NOR) flash chip: allow passing "last" as an alias for the number of the last sector. Improve several aspects of error checking while we're at it. From: Johnny Halfmoon <jhalfmoon@milksnot.com> git-svn-id: svn://svn.berlios.de/openocd/trunk@2746 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update presentation of TAP events and tap enable/disable.dbrownell2009-09-211-31/+77
| | | | | | | | | Highlight that the "post-reset" event kicks in before the scan chain is validated, which limits what can be done in a post-reset handler. git-svn-id: svn://svn.berlios.de/openocd/trunk@2745 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying end-of-line whitespace from doc/* files.dbrownell2009-09-2115-131/+131
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2744 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying end-of-line whitespace from tcl/* filesdbrownell2009-09-2185-683/+682
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2743 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying end-of-line whitespace from most src/*dbrownell2009-09-2120-183/+183
| | | | | | | files; omitted src/httpd git-svn-id: svn://svn.berlios.de/openocd/trunk@2742 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Ethan Eade <ethan@evolution.com> board config script for Cogent CSB732 ↵oharboe2009-09-211-0/+71
| | | | | | i.MX35 (arm1136) git-svn-id: svn://svn.berlios.de/openocd/trunk@2741 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Ensure that DaVinci chips can't start with a too-fast JTAG clock.dbrownell2009-09-213-0/+18
| | | | | | | | | | It can be sped up later, once it's known the PLLs are active. Note that modern tools from TI all use adaptive clocking; and that if that's done with OpenOCD, "too fast" is also a non-issue. git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update the jtag-examine_chain() logic to verify that there's nodbrownell2009-09-211-38/+39
| | | | | | | | | | | | | | | | garbage after the expected data (from the TAPs' BYPASS or IDCODE registers). NOTE that there was previously some code that looked like it was trying to do this ... which didn't work, because it was looping over the list of expected TAPs, and never checked *after* that list completed! That could hide some *nasty* reset issues... Also replace a now-obsolete scanchain length test with one that behaves correctly; and update reporting of unexpected IDCODEs. git-svn-id: svn://svn.berlios.de/openocd/trunk@2739 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Enhancement: stm32 flash protection error messagedbrownell2009-09-201-1/+1
| | | | | | | | | | This patch modifies an error message which, in its original state, I find somewhat unhelpful. So a small hint was added. Signed-off-by: Johnny Halfmoon <jhalfmoon at milksnot.com> git-svn-id: svn://svn.berlios.de/openocd/trunk@2738 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update the User's Guide to cover the scan chain verification stepdbrownell2009-09-201-16/+87
| | | | | | | | done on exit from the config stage, how JTAG clocking issues can trigger errors there, and how to avoid such problems. git-svn-id: svn://svn.berlios.de/openocd/trunk@2737 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Debug message updates:dbrownell2009-09-203-43/+8
| | | | | | | | | | | | | | | | | | | - Shrink messaging during resets, primarily by getting rid of "nothing happened" noise that hides *useful* information. - Improve: the "no IDCODE" message by identifying which tap only supports BYPASS; and the TAP event strings. Related minor code updates: - Remove two needless tests when examining the chain: we know we have a TAP, and that all TAPs have names. - Clean up two loops, turning "while"s into "for"s which better show what's actually being done. git-svn-id: svn://svn.berlios.de/openocd/trunk@2736 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor regression bugfix for the jtag_tap_handle_event() casedbrownell2009-09-201-3/+7
| | | | | | | | for disabling TAPs. We don't actually know how to make any JRCs which do that yet; but when we do, this will matter. git-svn-id: svn://svn.berlios.de/openocd/trunk@2735 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Added CPUDBG_WCR_BASE definemlu2009-09-191-0/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2734 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Avoid cache invalidation when writing to hardware debug registersmlu2009-09-191-4/+19
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2733 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Reduced sleep time after reset mlu2009-09-191-1/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2732 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Style cleanup for the updated ft2232_add_pathmove().dbrownell2009-09-191-15/+18
| | | | | | | Indentation, whitespace, line lengths. git-svn-id: svn://svn.berlios.de/openocd/trunk@2731 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor behavior fixes for the two JTAG reset events (C/internal,dbrownell2009-09-192-15/+14
| | | | | | | | | | | | | | | | | and Tcl/external): - Reorder so *both* paths (TCK/TMS or TRST) can enable TAPs with ICEpick ... first C code flags TAPs that got disabled, then call any Tcl code that might want to re-enable them. - Always call the C/internal handlers when JTAG operations can be issued; previously that wasn't done when TRST was used. Plus some small cleanups (whitespace, strings, better messaging during debug and on some errors) to reset-related code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2730 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor tweaks to description of JTAG adapter/dongle issues.dbrownell2009-09-191-4/+12
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2729 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.cmlu2009-09-182-46/+42
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2728 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* remove unused externsoharboe2009-09-181-3/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2727 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Tweak TCL reset script ... mostly improving descriptions ofdbrownell2009-09-181-12/+27
| | | | | | | the various steps, but also calling [target names] only once. git-svn-id: svn://svn.berlios.de/openocd/trunk@2726 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Address codereview comment from Steve Grubb <sgrubb@redhat.com>:dbrownell2009-09-172-33/+26
| | | | | | | | | | avoid a duplicate test. Plus other cleanup in the same code: be "static", sane line lengths for source and diagnostics, and fix misleading variable names. git-svn-id: svn://svn.berlios.de/openocd/trunk@2725 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor fixes to NAND code and docsdbrownell2009-09-172-28/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | Erase logic: - command invocation + treat "nand erase N" (no offset/length) as "erase whole chip N" + catch a few more bogus parameter cases, like length == 0 (sigh) - nand_erase() should be static - on error + say which block failed, and if it was a bad block + don't give up after the first error; try to erase the rest - on success, say which nand device was erased (name isn't unique) Device list ("nand list"): - say how many blocks there are - split summary into two lines - give example in the docs Doc tweaks: - Use @option{...} for DaVinci's supported hardware ECC options For the record, I've observed that _sometimes_ erasing bad blocks causes failure reports, and that manufacturer bad block markers aren't always erasable (even when erasing their blocks doesn't trigger an error report). git-svn-id: svn://svn.berlios.de/openocd/trunk@2724 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Fix coredump seen in some code paths.dbrownell2009-09-171-0/+3
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2723 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* michal smulski <michal.smulski@ooma.com> fix regression in ↵oharboe2009-09-171-18/+30
| | | | | | jtag_add_pathmove() which broke arm11 in r1825. Other uses of jtag_add_pathmove are svn + xsvf + xscale... git-svn-id: svn://svn.berlios.de/openocd/trunk@2722 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* prefix zy1000_reboot command to avoid name conflictsoharboe2009-09-171-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2721 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* srst_gates_jtag option. at91sam9260 needs retesting, and possibly ↵oharboe2009-09-174-1/+25
| | | | | | srst_gates_jtag added to reset_config. Could i.MX27 be a case where srst does not pull trst, but really srst gates jtag clock? git-svn-id: svn://svn.berlios.de/openocd/trunk@2720 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* The "arm9tdmi.c" file is more of a generic ARM9 support file:dbrownell2009-09-172-7/+26
| | | | | | | | | | | - update comments to say so. - update docs to clarify that the "arm9tdmi" command prefix is a misnomer. - bugfix some messages that wrongly assume only ARM9TDMI based processors use this code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2719 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Doc update: mention how ARM's WFI instruction affectsdbrownell2009-09-171-9/+56
| | | | | | | | | JTAG clocking by gating the core clock, and workarounds. Most details are with the "halt" command, which is one of the first places this issue will be noticed. git-svn-id: svn://svn.berlios.de/openocd/trunk@2718 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove unused varables (moved to armv7a)mlu2009-09-161-5/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2717 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Use a variable armv7a->debug_base instead of hardedcoded OMAP3530_DEBUG_BASEmlu2009-09-161-28/+31
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2716 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Rolf Meeser <rolfm_9dq@yahoo.de> adds flash support for NXP's LPC2900 family ↵oharboe2009-09-167-5/+2263
| | | | | | (ARM968E). git-svn-id: svn://svn.berlios.de/openocd/trunk@2715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Define debug_base, debug_ap, memory_ap in armv7a_common_tmlu2009-09-151-0/+7
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2714 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Updated mode string list.mlu2009-09-151-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2713 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Definy symbolic values for VA to PA address translation operationsmlu2009-09-151-0/+10
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2712 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fix bug when using 32 instead of 64 bit value in callback, caught by -Walloharboe2009-09-151-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2711 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* added embedded ice programming while srst is asserted todo itemoharboe2009-09-151-0/+4
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2710 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Check return values to avoid infinite wait in loop on error.mlu2009-09-141-4/+8
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2709 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Cache invalidation when writing to memorymlu2009-09-141-0/+18
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2708 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* error message upon recursive invocation of reset from reset event handlersoharboe2009-09-141-0/+22
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2707 b42882b7-edfa-0310-969c-e2dbd0fdcd60
generated by cgit v1.2.3 (git 2.46.0) at 2024-11-05 01:10:00 +0000