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* configure: fix build problems with eCosØyvind Harboe2009-11-041-6/+57
| | | | | | | Various include files require some other include files to be included first. Copied solution from net/if.h. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* docs: add reference to git bisect docs on BUGS pageØyvind Harboe2009-11-041-1/+2
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: 20 second timeout/megabyte for CRC checkØyvind Harboe2009-11-031-1/+4
| | | | | | | There was a fixed 20 second timeout which is too little for large, slow timeout checks. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm920t: memory writes were broken when MMU was disabledØyvind Harboe2009-11-031-11/+10
| | | | | | | | | | | To support breakpoints, flush data cache line and invalidate instruction cache when 4 and 2 byte words are written. The previous code was trying to write directly to the physical memory, which was buggy and had a number of other situations that were not handled. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: require working area for physical/virtual addresses to be specifiedØyvind Harboe2009-11-032-9/+29
| | | | | | | | | | | | | | | | Fixed bug: if virtual address for working memory was not specified and MMU was enabled, then address 0 would be used. Require working address to be specified for both MMU enabled and disabled case. For some completely inexplicable reason this fixes the regression in svn 2646 for flash write in arm926ejs target. The logs showed that MMU was disabled in the case below: https://lists.berlios.de/pipermail/openocd-development/2009-November/011882.html Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* FT2232: increase read retry countsDimitar Dimitrov2009-11-011-8/+26
| | | | | | | | This change is necessary to debug AT91SAM9260 on my PC with a FT2232H dongle. Signed-off-by: Dimitar Dimitrov <dinuxbg@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* User's Guide: more init info, autoprobing, etcDavid Brownell2009-11-011-6/+93
| | | | | | | | | | | | | Mention the autoprobing as a tool that may be useful when figuring out how to set up; and add a section showing how to use that mechanism (with an example). Strengthen the differences between config and run stage descriptions; add a section for the latter. Mention Dragonite. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* doxygen: avoid most internalsDavid Brownell2009-11-011-2/+2
| | | | | | | | | | | | | | For some reason, all the interals are documented by default. This is wrong for two basic reasons:  - We need to focus on public interfaces, since those are the architectural interfaces and relationships.  - Since virtually nothing has doxygen support yet, this    maximizes the noise, and minimizes the usefulness of doxygen output. So don't expose so much by default.
* remove "-ircapture 0x1 -irmask 0x1" from stm32.cfgFreddie Chopin2009-11-011-2/+5
| | | | | | | | Gets rid of the runtime warning "stm32.bs: nonstandard IR mask" [dbrownell@users.sourceforge.net: line lengths, note issue, section ref] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* arm9tdmi: more correct fix for vector_catchDavid Brownell2009-10-311-8/+5
| | | | | | | Just use the array of names we're given, ignoring indices. The "reserved means don't use" patch missed that change. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target.cfg: use $_TARGETNAME for flashFreddie Chopin2009-10-3113-13/+13
| | | | | | | | | This gets rid of runtime warnings from the use of numbers. STM32 and LPC2103 were tested. Other LPC updates are the same, and so are safe. The CFI updates match other tested changes now in the tree. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* NEWS: more infoDavid Brownell2009-10-301-4/+24
| | | | | | | | There were a few more changes worth mentioning, including support for more JTAG adapters, boundary scan improvements, another NAND driver, and the Win64 stuff. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM926: fix arm926ejs_mmu() reading from bad pointerDavid Brownell2009-10-301-1/+3
| | | | | | | | | I'm suspecting this code can never have worked, since the original commit (svn #335) in early 2008. Fix is just copy/paste from another (working) function. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* bin2char: for win32 set stdin/stdout to binary modeSpencer Oliver2009-10-301-0/+10
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* SVF: fix checking bit pattern against lengthMichael Roth2009-10-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The code works like follow (N = bit_len): N -1 %4 2<< -1 ~ (binary) -------------------------------------------------- 1 0 0 2 1 1111 1110 2 1 1 4 3 1111 1100 3 2 2 8 7 1111 1000 4 3 3 16 15 1111 0000 5 4 0 2 1 1111 1110 6 5 1 4 3 1111 1100 7 6 2 8 7 1111 1000 8 7 3 16 15 1111 0000 ... ... ... ... ... ... Addresses a bug reported by FangfangLi <ffli@syntest.com.cn>. [dbrownell@users.sourceforge.net: fix spelling bug too] Signed-off-by: Michael Roth <mroth@nessie.de> Cc: FangfangLi <ffli@syntest.com.cn> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Olimex FT2232H JTAG adaptersDimitar Dimitrov2009-10-292-0/+22
| | | | | | | | Add interface configs for two new high speed JTAG adapters from Olimex. They need some other speed related tweaks to work well at high speed. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* XSVF: bugfix handling state pathsDavid Brownell2009-10-291-15/+100
| | | | | | | | | | | | | | | | | | | | | | | Implement XSVF support for detailed state path transitions, by collecting sequences of XSTATE transitions into paths and then calling pathmove(). It seems that the Xilinx tools want to force state-by-state transitions instead of relying on the standardized SVF paths. Like maybe there are XSVF tools not implementing SVF paths, which are all that we support using svf_statemove(). So from IRPAUSE, instead of just issuing "XSTATE DRPAUSE" they will issue XSTATES for each intermediate state: first IREXIT2, then IRUPDATE, DRSELECT, DRCAPTURE, DREXIT1, and finally DRPAUSE. This works now. Handling of paths that go *through* reset is a trifle dodgey, but it should be safe. Tested-by: Wookey <wookey@wookware.org> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Bump rc version and add -dev tag.Zachary T Welch2009-10-281-1/+1
| | | | | Bump rc package version number: 0.3.0-rc0 -> 0.3.0-rc1 Add '-dev' version tag: 0.3.0-rc1 -> 0.3.0-rc1-dev
* The openocd 0.3.0-rc0 release.Zachary T Welch2009-10-281-1/+1
| | | | Remove '-dev' version tag: 0.3.0-rc0-dev -> 0.3.0-rc0
* Cortex-M3: remove exports and forward declsDavid Brownell2009-10-282-189/+144
| | | | | | | | | | | Unneeded exports cause confusion about the module interfaces. Make most functions static, and fix some line-too-long issues. Delete some now-obviously-unused code. The forward decls are just code clutter; move their references later, after the normal declarations. (Or vice versa.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM926: remove exports and forward declsDavid Brownell2009-10-281-122/+127
| | | | | | | | | | | | | Unneeded exports cause confusion about the module interfaces. Only the Feroceon code builds on this, so only routines it reuses should be public.. Make most remaining functions static, and fix some of the line-too-long issues. The forward decls are just code clutter; move their references later, after the normal declarations. Turns out we don't need even one forward declaration in this file. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* bugfix: stack corruption loading IHex imagesFranck HÉRÉSON2009-10-282-1/+22
| | | | | | | | | | | | The Hex parser uses a fixed number of sections. When the number of sections in the file is greater than that, the stack get corrupted and a CHECKSUM ERROR is detected which is very confusing. This checks the number of sections read, and increases IMAGE_MAX_SECTIONS so it works on my file. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Add script to test the release process.Zachary T Welch2009-10-271-0/+121
| | | | | Runs the release.sh script in a freshly cloned repository, charting one hypothetical future of OpenOCD's lineage.
* Rewrite release script to use GIT.Zachary T Welch2009-10-272-512/+210
| | | | | | | | Update documentation to reflect GIT methodology. Rewrite release.sh script to use appropriate process. With this update, tools/release.sh can be used for producing private release tags on local branches. The documentation still needs work, but their use for v0.3.x should help rectify the deficiences.
* Factor version munging capabilities out of release.sh.Zachary T Welch2009-10-271-0/+137
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* Factor release version functions into new script.Zachary T Welch2009-10-271-0/+60
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* Add git2cl from repo.or.cz as a submodule in tools/git2cl.Zachary T Welch2009-10-272-0/+3
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* Improve .gitignore rules.Zachary T Welch2009-10-271-1/+5
| | | | | | | | A '.*' rule prevents the 'git submodule add' from correctly adding the first submodule, because it creates the .gitmodule file. This file will not be added (without -f) result in incomplete submodule commits. The new rules mask the specific files present in my own build tree, but additional rules may be needed to hide other types of temporary files.
* ARM: fix single-step of Thumb unconditional branchNicolas Pitre2009-10-271-2/+2
| | | | | | | | | Only type 1 branch instruction has a condition code, not type 2. Currently they're both tagged with ARM_B which doesn't allow for the distinction. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: fix target address when disassembling Thumb BLXNicolas Pitre2009-10-271-0/+1
| | | | | | | | A Thumb BLX instruction is branching to ARM code, and therefore the first 2 bits of the target address must be cleared. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Signalyzer: H2 and H4 supportOleg Seiljus2009-10-272-1/+810
| | | | | | | | | | This patch includes partial support for these new JTAG adapters. More complete support will require updates to the libftdi code, for EEPROM access. [dbrownell@users.sourceforge.net: fix whitespace, linelen, etc ] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Signalyzer: new config filesOleg Seiljus2009-10-273-0/+33
| | | | | | Add configs for H2, H4, LITE. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: fix Thumb mode handling when single-stepping register based branch insnsNicolas Pitre2009-10-261-22/+33
| | | | | | | | | | | | | | | | | | | Currently, OpenOCD is always caching the PC value without the T bit. This means that assignment to the PC register must clear that bit and set the processor state to Thumb when it is set. And when the PC register value is transferred to another register or stored into memory then the T bit must be restored. Discussion: It is arguable if OpenOCd should have preserved the original PC value which would have greatly simplified this code. The processor state could then be obtained simply by getting at bit 0 of the PC. This however would require special handling elsewhere instead since the T bit is not always relevant (like when PC is used with ALU insns or as an index with some addressing modes). It is unclear which way would be simpler in the end. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: allow proper single stepping of Thumb BL and BLX instructionsNicolas Pitre2009-10-261-0/+12
| | | | | | | | | | | | | | Whenever an unconditional branch with the H bits set to 0b10 is met, the offset must be combined with the offset from the following opcode and not ignored like it is now. A comment in evaluate_b_bl_blx_thumb() suggests that the Thumb2 decoder would be a simpler solution. That might be true when single-stepping of Thumb2 code is implemented. But for now this appears to be the simplest solution to fix Thumb1 support. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: call thumb_pass_branch_condition() only for actual branch opcodesNicolas Pitre2009-10-261-8/+6
| | | | | | | | | | | | | | Calling it first with every opcodes and then testing if the opcode was indeed a branch instruction is wasteful and rather strange. If ever thumb_pass_branch_condition() has side effects (say, like printing a debugging traces) then the result would be garbage for most Thumb instructions which have no condition code. While at it, let's make the nearby code more readable by reducing some of the redundant brace noise and reworking the error handling construct. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ft2232: less noise with _DEBUG_JTAG_IO_David Brownell2009-10-261-1/+0
| | | | Don't log "Yes, I'm *still* in TAP_IDLE" every seven runtest clocks.
* JTAG: "jtag newtap ..." cleanupDavid Brownell2009-10-261-7/+2
| | | | | | Get rid of needless variable, improve and shrink diagnostic. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* PXA255: force reset configDavid Brownell2009-10-261-0/+4
| | | | | These chips need both SRST and TRST when debugging, and SRST doesn't gate JTAG.
* omap3530: target reset/init improvementsDavid Brownell2009-10-261-15/+25
| | | | | | | | | | | | | | | | | Now I can issue "reset halt" and have everything act smoothly; the vector_catch hardware is obviously not kicking in, but the rest of the reset sequence acts sanely. - TAP "setup" event enables the DAP, not omap3_dbginit (resolving a chicken/egg bug I noted a while back) - Remove stuff from omap3_dbginit which should never be used in event handlers - Cope better with slow clocking during reset Also, stop hard-wiring the target name: use the input params in the standard way, and set up $_TARGETNAME as an output param. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM ADIv5: "dap info" gets more readableDavid Brownell2009-10-261-33/+268
| | | | | | | | | | | | | | Make the "dap info" output more comprehensible: - Don't show CIDs unless they're incorrect (only four bits matter) - For CoreSight parts, interpret the part type - Interpret the part number - Show all five PID bytes together - Other minor cleanups Also some whitespace fixes, and shrink a few overlong source lines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Fix incorrect line endingsSpencer Oliver2009-10-2630-27885/+27885
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Merge branch 'master' of ↵David Brownell2009-10-261-0/+5
|\ | | | | | | ssh://dbrownell@openocd.git.sourceforge.net/gitroot/openocd/openocd
| * Idea for adding watchpoint masks.Øyvind Harboe2009-10-261-0/+5
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* | balloon3 board base configWookey2009-10-261-0/+13
| | | | | | | | | | | | | | | | | | | | | | This is the very basic board config for the balloon3 board cpu JTAG channel. The rest of the config comprises another 14 .cfg files which I suspect openocd doesn't really want all of. I'm still not sure how to deal with this. I'll post another mail/patch to discuss. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* | SVF: fix parsing hex strings containing leading '0' charactersMichael Roth2009-10-261-0/+4
|/ | | | | | | | | Ignore leading '0' characters on hex strings. For example a bit pattern consisting of 6 bits could be written as 3f, 03f or 003f and so on. Signed-off-by: Michael Roth <mroth@nessie.de> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* JTAG: simple autoprobingDavid Brownell2009-10-262-14/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic autoprobing support for the JTAG scan chains which cooperate. To use, you can invoke OpenOCD with just: - interface spec: "-f interface/...cfg" - possibly with "-c 'reset_config ...'" for SRST/TRST - possibly with "-c 'jtag_khz ...'" for the JTAG clock Then set up config files matching the reported TAPs. It doesn't declare targets ... just TAPs. So facilities above the JTAG and SVF/XSVF levels won't be available without a real config; this is almost purely a way to generate diagnostics. Autoprobe was successful with most boards I tested, except ones incorporating C55x DSPs (which don't cooperate with this scheme for IR length autodetection). Here's what one multi-TAP chip reported, with the "Warn:" prefixes removed: clock speed 500 kHz There are no enabled taps. AUTO PROBING MIGHT NOT WORK!! AUTO auto0.tap - use "jtag newtap auto0 tap -expected-id 0x2b900f0f ..." AUTO auto1.tap - use "jtag newtap auto1 tap -expected-id 0x07926001 ..." AUTO auto2.tap - use "jtag newtap auto2 tap -expected-id 0x0b73b02f ..." AUTO auto0.tap - use "... -irlen 4" AUTO auto1.tap - use "... -irlen 4" AUTO auto2.tap - use "... -irlen 6" no gdb ports allocated as no target has been specified The patch tweaks IR setup a bit, so we can represent TAPs with undeclared IR length. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* minor fixes to TODO listDavid Brownell2009-10-251-5/+5
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* fix syntax of mww phys.Øyvind Harboe2009-10-255-44/+44
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* check if mmu is enabled before using mmu code pathØyvind Harboe2009-10-251-1/+1
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* ARM: rename "arm9tdmi vector_catch" to "arm9 ..."David Brownell2009-10-254-17/+11
| | | | | | And update doc accordingly. That EmbeddedICE register was introduced for ARM9TDMI and then carried forward into most new chips that use EmbeddedICE.
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