| Commit message (Collapse) | Author | Age | Files | Lines |
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- fixed bug in ARM926EJ-S cache handling that caused cache linefills to be disabled after first debug entry
- added support for auto image type detection (thanks to Vincent Palatin)
- further work on ETM trace decoding (tested with a ETB interface using an ETM in normal 16-bit port mode, still experimental)
git-svn-id: svn://svn.berlios.de/openocd/trunk@169 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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-- changed arm966e to use standard arm9_7 reset handling
git-svn-id: svn://svn.berlios.de/openocd/trunk@146 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- use BKPT instruction on cores supporting it (ARM926EJ-S, ARM966E-S)
- correctly handle endianness of software breakpoint instruction
git-svn-id: svn://svn.berlios.de/openocd/trunk@143 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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(jtag_[plain_][ir|dr]_scan)
- catch apparently broken JTAG IR scan after ARM926EJ-S CP15 operations
- added "arm7_9 dump_etb" command
git-svn-id: svn://svn.berlios.de/openocd/trunk@142 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- added "prepare_reset_halt()" to target_type_t, which allows reset_halt to be prepared before a reset is asserted, possibly preventing communication with the target
- arm7/9 devices now use a breakpoint at 0x0 or reset vector catching for debug out of reset
git-svn-id: svn://svn.berlios.de/openocd/trunk@141 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- fixed arm926ej-s CP15 register access handling
- correctly identify SYSCLK source in LPC3180 NAND flash controller driver
git-svn-id: svn://svn.berlios.de/openocd/trunk@139 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- added missing arm926ej-s cp15 patch (thanks Vincent Palatin)
git-svn-id: svn://svn.berlios.de/openocd/trunk@136 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Added contributors to AUTHORS file
- Added link to Joern Kaipf's OOCD-Link
git-svn-id: svn://svn.berlios.de/openocd/trunk@126 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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