summaryrefslogtreecommitdiff
path: root/src/target/armv4_5.c
Commit message (Collapse)AuthorAgeFilesLines
* target: simplify register get/set opsDavid Brownell2009-11-171-8/+6
| | | | | | | | | | | No need to indirect from registered integers to pointers. Just stash the pointers directly in the register struct, and don't even bother registering. This is a small code shrink, speeds register access just a smidgeon, and gets rid of another rude exit() path. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv4/ARMv5: no exit() callsDavid Brownell2009-11-161-6/+8
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: register (most) standard ARM commandsDavid Brownell2009-11-161-1/+8
| | | | | | | Have ARM11 register the "standard" ARM commands. For now, only disassembly really works. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: "armv4_5" command prefix becomes "arm"David Brownell2009-11-161-9/+9
| | | | | | | | | | Rename the "armv4_5" command prefix to straight "arm" so it makes more sense for newer cores. Add a simple compatibility script. Make sure all the commands give the same "not an ARM" diagnostic message (and fail properly) when called against non-ARM targets. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: standard disassembler uses Thumb2 entryDavid Brownell2009-11-161-36/+32
| | | | | | | | | | | | | | | | | Tweak "standard" ARM disassembler diagnostics to fail if the target is not "an ARM" (vs. not "an ARMV4/5"), so it makes more sense for cores inheriting this as the "generic" disassembler. Also, to use the Thumb2 entry instead of the original Thumb entry. This makes it work better for both newer cores (which support those added instructions) and for BL and BLX instructions on older cores. (Those instructions are 32-bits, which requires curious state-aware code to go through a 16-bit decode interface...) Plus minor cleanups, notably to have fewer exit paths and to make sure they all return failure codes. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: move mode functions out of headerDavid Brownell2009-11-161-2/+52
| | | | | | | | | They're really too big to inline, at least for code that's not in any performance-critical loops. Also move the associated string table to the rodata section. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: less implicit inclusion of "etm.h"David Brownell2009-11-161-0/+1
| | | | | | | Don't include it in more headers than necessary; just use it in the few files that actually need it. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* move ARRAY_SIZE macro to types.hZachary T Welch2009-11-161-2/+2
| | | | | | | | The ARRAY_SIZE macro was defined in several target files, so move it to types.h. This patch also removes two other identical macros: DIM (from jtag.h) and asizeof (from arm11.h).
* target: no implicit #includes of "register.h"David Brownell2009-11-161-0/+1
| | | | | | | | | | | | Same deal: "register.h" got needlessly included all over the place because of being in a few widely included headers. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also, don't need that extra "types.h" inclusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: don't implicitly include "algorithm.h"David Brownell2009-11-161-0/+1
| | | | | | | | | | | | | | Most files in the tree seem to have ended up including this, and *quite* needlessly ... only code implementing or using downloadable algorithms actually needs these declarations. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also: "algorithm.h" doesn't need to include "types.h" again; it already comes from a different header. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: don't implicitly include "breakpoint.h"David Brownell2009-11-161-0/+1
| | | | | | | | | | | Most files in the tree seem to have ended up including this, and *quite* needlessly ... only code implementing or using breakpoints actually needs these declarations. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: memory utils aren't ARM7/ARM9 dependentDavid Brownell2009-11-151-0/+170
| | | | | | | | | | | | | | | | The arm7_9_checksum_memory() and arm7_9_blank_check_memory() routines are not actually specific to the ARM7 and ARM9 core generations ... they can work for any core which can run algorithms using basic ARM (not Thumb) instructions. Rename them; move the declarations to a more generic site; likewise move the code (and tidy it a bit in the process). NOTE: the blank_check() method falsely returned a success status (0) on one error path, when the algorithm failed. Fixed this bug. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: remove unused "bitfield" infrastructureDavid Brownell2009-11-131-20/+14
| | | | | | | | | | | | | | We have too many different registers, and too many version and context dependent interpretations, for this type of bitfield management to be scalable. (Anyone who really wants bitfield interpretation *can* do that in Tcl code...) There are ... quite a few copies of the same ARM dummy registers. There should eventually be one copy; this many is craziness. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* command_t -> struct commandZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct command.
* command_context_t -> struct command_contextZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct command_context.
* target_t -> struct targetZachary T Welch2009-11-131-13/+13
| | | | Remove misleading typedef and redundant suffix from struct target.
* reg_t -> struct regZachary T Welch2009-11-131-9/+9
| | | | Remove misleading typedef and redundant suffix from struct reg.
* armv4_5_common_t -> struct armZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and just use struct arm.
* arm_instruction_t -> struct arm_instructionZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct arm_instruction.
* reg_cache_t -> struct reg_cacheZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct reg_cache.
* bitfield_desc_t -> struct bitfield_descZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct bitfield_desc.
* armv4_5_core_reg_t -> struct armv4_5_core_regZachary T Welch2009-11-131-4/+4
| | | | Remove misleading typedef and redundant suffix from struct armv4_5_core_reg.
* armv4_5_algorithm_t -> struct armv4_5_algorithmZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct armv4_5_algorithm.
* reg_param_t -> struct reg_paramZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct reg_param.
* mem_param_t -> struct mem_paramZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct mem_param.
* use COMMAND_HANDLER macro to define all commandsZachary T Welch2009-11-131-5/+3
|
* ARM: other code uses the new inheritance/nesting schemeDavid Brownell2009-11-051-9/+9
| | | | | | | Remove most remaining uses of target->arch_info from ARM infrastructure, where it hasn't already been updated. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Improve armv4_5 command argument parsing.Zachary T Welch2009-11-051-2/+2
|
* David Brownell <david-b@pacbell.net> oharboe2009-09-091-4/+17
| | | | | | | | | | | | | | | | | Optionally shave time off the armv4_5 run_algorithm() code: let them terminate using software breakpoints, avoiding roundtrips to manage hardware ones. Enable this by using BKPT to terminate execution instead of "branch to here" loops. Then pass zero as the exit address, except when running on an ARMv4 core. ARM7TDMI, ARM9TDMI, and derived cores now set a flag saying they're ARMv4. Use that mechanism in arm_nandwrite(), for about 3% speedup on a DaVinci ARM926 core; not huge, but it helps. Some other algorithms could use this too (mostly flavors of flash operation). git-svn-id: svn://svn.berlios.de/openocd/trunk@2680 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> Tweak disassembly commands:oharboe2009-08-251-16/+39
| | | | | | | | | | | | | | | | | | For ARMv4/ARMv5: - better command parameter error checking - don't require an instruction count; default to one - recognize thumb function addresses - make function static - shorten some too-long lines For Cortex-M3: - don't require an instruction count; default to one With the relevant doc updates. --- Nyet done: invoke the thumb2 disassembler on v4/v5, to better handle branch instructions. git-svn-id: svn://svn.berlios.de/openocd/trunk@2624 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove whitespace at end of lines, step 1.zwelch2009-06-231-3/+3
| | | | | | | - Replace '\s*$' with ''. git-svn-id: svn://svn.berlios.de/openocd/trunk@2379 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove whitespace that occurs before ')'.zwelch2009-06-231-1/+1
| | | | | | | - Replace '[ \t]*[)]' with ')'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2377 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove whitespace that occurs after '('.zwelch2009-06-231-1/+1
| | | | | | | - Replace '([ \t]*' with '('. git-svn-id: svn://svn.berlios.de/openocd/trunk@2376 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fixes '[|]' whitespacezwelch2009-06-231-1/+1
| | | | | | | | | | - Replace ')\([|]\)(' with ') \1 ('. - Replace ')\([|]\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\([|]\)(' with '\1 \2 ('. - Replace '\(\w\)\([|]\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2374 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fixes '+' whitespacezwelch2009-06-231-1/+1
| | | | | | | | | | - Replace ')\(+\)(' with ') \1 ('. - Replace ')\(+\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(+\)(' with '\1 \2 ('. - Replace '\(\w\)\(+\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2373 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fixes '=' whitespacezwelch2009-06-231-3/+3
| | | | | | | | | - Replace ')\(=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(=\)(' with '\1 \2 ('. - Replace '\(\w\)\(=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2372 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fixes '!=' whitespacezwelch2009-06-231-3/+3
| | | | | | | | | - Replace ')\(!=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(!=\)(' with '\1 \2 ('. - Replace '\(\w\)\(!=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2363 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* C99 printf() -Werror fixesduane2009-06-211-6/+10
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2309 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u32' to 'uint32_t' in src/target/arm*zwelch2009-06-181-9/+9
| | | | | | | | - Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2278 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u16' to 'uint16_t'zwelch2009-06-181-1/+1
| | | | | | | | - Replace '\([^_]\)u16' with '\1uint16_t'. - Replace '^u16' with 'uint16_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u8' to 'uint8_t' in src/targetzwelch2009-06-181-3/+3
| | | | | | | | - Replace '\([^_]\)u8' with '\1uint8_t'. - Replace '^u8' with 'uint8_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net>: This patch adds annotations tozwelch2009-05-211-1/+1
| | | | | | | | | | the key command_*() helper functions, fixng the bugs that turned up. Several of these bugs were from misuse of PRIi64; that's for 64-bit integers, NOT for "long long" or "u64" (which work best with %lld). git-svn-id: svn://svn.berlios.de/openocd/trunk@1873 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Audit and eliminate redundant #include directives in arm target files.zwelch2009-05-111-12/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1714 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> whitespace fixes.oharboe2009-05-101-10/+10
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1690 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Zach Welch <zw@superlucidity.net> fix -Werror warningsoharboe2009-04-191-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1472 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Slight improvement in run_algorithm register restore.mlu2009-04-031-4/+9
| | | | | | | More debug info for cortex swjdp errors. git-svn-id: svn://svn.berlios.de/openocd/trunk@1453 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Fix handling of thumb disassembly in armv4_5 disassemble. Courtesy of Adam ↵kc8apf2009-01-191-5/+19
| | | | | | Dybkowski <adybkows@wp.pl> git-svn-id: svn://svn.berlios.de/openocd/trunk@1338 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - remove target specific variant and use target->variant memberntfreak2008-12-131-2/+0
| | | | | | | - fix build warning in cortex_m3 - code cleanup - remove trailing lf and convert c++ comments git-svn-id: svn://svn.berlios.de/openocd/trunk@1238 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* more robust error reporting for DCCoharboe2008-10-161-0/+3
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1068 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Laurentiu Cocanu - add error handlingoharboe2008-10-141-8/+30
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1057 b42882b7-edfa-0310-969c-e2dbd0fdcd60
generated by cgit v1.2.3 (git 2.46.0) at 2024-12-28 22:18:33 +0000