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* more xscale cleanup (mostly removing JTAG hooks)David Brownell2009-10-122-88/+65
| | | | | | | | | | | | | | | | Streamline/shrink some needless JTAG stuff: - Use #defines for the JTAG instructions; they can't ever change - Remove an unused (!) shadow of tap->ir_length - Stop using a copy of target->tap - Don't bother saving the variant after sanity checking ir_length Also, make target_create() work as on other targets: build the register cache later, making init_target() no longer be a NOP. Handle malloc failure; remove a comment that was obsoleted by the not-so-new target syntax. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Merge commit 'origin/master'Øyvind Harboe2009-10-123-256/+257
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| * xscale_load_ic cleanupDavid Brownell2009-10-111-16/+16
| | | | | | | | | | | | | | | | Remove unused and deprecated (in the arch spec) mode for loading code into the *main* icache (vs the "mini" icache). Disable some extremely noisy (and rarely useful) low-level debug messages Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
| * xscale.c cleanupDavid Brownell2009-10-111-186/+197
| | | | | | | | | | | | | | | | | | Declare almost everything as static. Move stuff to remove most forward references. Remove most forward declarations. Warn if the unimplemented register functions get called. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
| * xscale bugfix to handler loadingDavid Brownell2009-10-111-2/+2
| | | | | | | | | | | | | | | | | | Just fill out the rest of the cache line with NOPs; don't change the record of how much data we consumed. Otherwise the count of how much data is left can roll over from positive to negative ("VERY positive") and skip the loop termination of zero. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
| * xscale minor cleanupDavid Brownell2009-10-111-43/+31
| | | | | | | | | | | | | | | | | | | | | | | | Add a header comment referencing useful XScale specs. Make most data static, and the tables readonly. Scrub extra blank lines. Return fault codes from one routine. Remove a needless NOP methood. (BUGFIX) When we update R0, mark R0 as dirty/valid ... not R15/PC! Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
| * printf format warning fixesDavid Brownell2009-10-102-12/+14
| | | | | | | | | | | | Observed on a Cygwin build. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* | If halt times out, stop GDB. Allows e.g. manual reset via monitor commands.Øyvind Harboe2009-10-122-2/+39
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* ARM11 error checkingØyvind Harboe2009-10-093-52/+119
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* prevent abort via polling during jtag_resetDavid Brownell2009-10-081-9/+8
| | | | | | | | | | | | | Observed: openocd: core.c:318: jtag_checks: Assertion `jtag_trst == 0' failed. The issue was that nothing disabled background polling during calls from the TCL shell to "jtag_reset 1 1". Fix by moving the existing poll-disable mechanism to the JTAG layer where it belongs, and then augmenting it to always pay attention to TRST and SRST. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Stop GDB when polling fails, srst assert or powerdropout is detectedØyvind Harboe2009-10-082-4/+24
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* buildfixdbrownell2009-10-071-0/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2821 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Updates for "reset_config":dbrownell2009-10-071-4/+11
| | | | | | | | | | | - revert to previous default: don't talk JTAG during SRST - add "srst_nogates" flag, the converse of "srst_gates_jtag" - with no args, display the current configuration And update the User's Guide text with bullet lists to be a bit more clear. git-svn-id: svn://svn.berlios.de/openocd/trunk@2818 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* add timeouts and fix syntax error handling of mrc/mcr commands.oharboe2009-10-071-1/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2815 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* add timeouts and fix syntax error handling of mrc/mcr commands.oharboe2009-10-071-18/+59
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2814 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Dragonite has the same EICE affliction as feroceon.dbrownell2009-10-061-1/+2
| | | | | | | From: Nicolas Pitre <nico@fluxnic.net> git-svn-id: svn://svn.berlios.de/openocd/trunk@2807 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor cleanup to ARM926 debug entry:dbrownell2009-10-051-2/+6
| | | | | | | | | | | | - don't needlessly export this function - handle "case 0" debug method-of-entry better (silent by default) The "case 0" is a valid debug entry mode so it doesn't deserve the warning int now gets. But it probably means that OpenOCD confused itself somehow; or that it confused the ARM9EJS target. git-svn-id: svn://svn.berlios.de/openocd/trunk@2799 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* It is not possible to invalidate I-Cache on memory writes while the target ↵mlu2009-10-021-0/+3
| | | | | | is running git-svn-id: svn://svn.berlios.de/openocd/trunk@2795 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Make sure that DSCR_DTR_RX is not full before writingmlu2009-10-021-0/+27
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2794 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* More error reporting in Cortex_a8 execute_opcodemlu2009-10-021-0/+6
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2793 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Added asser_reset and deassert_reset for cortex_a8mlu2009-10-021-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2792 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Added asser_reset and deassert_reset for cortex_a8mlu2009-10-021-22/+56
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2791 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor ETB and ETM bugfixes and doc updatesdbrownell2009-10-022-54/+82
| | | | | | | | | | | | | | | | | | | | | - ETB * report _actual_ hardware status, not just expected status * add a missing diagnostic on a potential ETB setup error * prefix any diagnostics with "ETB" - ETM * make "etm status" show ETM hardware status too, instead of just traceport status (which previously was fake, sigh) - Docs * flesh out "etm tracemode" docs a bit * clarify "etm status" ... previously it was traceport status * explain "etm trigger_percent" as a *traceport* option ETM+ETB tracing still isn't behaving, but now I can see that part of the reason is that the ETB turns itself off almost immediately after being enabled, and before collecting any data. git-svn-id: svn://svn.berlios.de/openocd/trunk@2790 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* ARMv7A: Report fault status registers when in Abort statemlu2009-10-011-0/+23
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2789 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Add DSCR_DTR_RX_FULL bit definemlu2009-09-301-0/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2780 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* ARM11 command handling fixesdbrownell2009-09-291-41/+41
| | | | | | | | | | | - Commands were supposed to have been "arm11 memwrite ..." not "memwrite ..." - Get rid of obfuscatory macros - Re-alphabetize - Add docs for "arm11 vcr" git-svn-id: svn://svn.berlios.de/openocd/trunk@2776 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* ETM: fix build issue on MinGW.dbrownell2009-09-291-20/+21
| | | | | | | The Win32 global namespace is rather cluttered... git-svn-id: svn://svn.berlios.de/openocd/trunk@2773 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* ETB: cleanup needless symbol exports and forward decls.dbrownell2009-09-292-40/+35
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2772 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Shrink symbols exported from arm9tdmi.c and remove a forward ref.dbrownell2009-09-281-35/+38
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2765 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* When setting up an ETM, cache its ETM_CONFIG register. Thendbrownell2009-09-232-51/+178
| | | | | | | | | | | | | | | | | | | | | | | | | only expose the registers which are actually present. They could be missing for two basic reasons: - This version might not support them at all; e.g. ETMv1.1 doesn't have some control/status registers. (My sample of ARM9 boards shows all with ETMv1.3 support, FWIW.) - The configuration on this chip may not populate as many registers as possible; e.g. only two data value comparators instead of eight. Includes a bugfix in the "etm info" command: only one of the two registers is missing on older silicon, so show the first one before bailing. Update ETM usage docs to explain that those registers need to be written to configure what is traced, and that some ETM configs are not yet handled. Also, give some examples of the kinds of constrained trace which could be arranged. git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Start cleaning up ETM register handling. On one ARM926 ETM+ETBdbrownell2009-09-232-167/+176
| | | | | | | | | | | | | | | | | | | | | | system, removes 20 non-existent registers ... but still includes over 45 (!) ETM registers which don't even exist there ... - Integrate the various tables to get one struct per register - Get rid of needless per-register dynamic allocation - Double check list of registers: * Remove sixteen (!) non-registers for data comparators * Remove four registers that imply newer ETM than we support * Change some names to match current architecture specs - Handle more register info * some are write-only * some are read-only * record which versions have them, just in case - Reorganize the registers to facilitate removing the extras * group e.g. comparator/counter #N registers together * add and use lookup-by-ID git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Initial ETM cleanups. Most of these are cosmetic:dbrownell2009-09-232-83/+113
| | | | | | | | | | | | | | | | - Add a header comment - Line up the ETM context struct, pack it a bit - Remove unused context_id (this doesn't support ETMv2 yet) - Make most functions static - Remove unused string table and other needless lines of code - Correct "tracemode" helptext Also provide and use an etm_reg_lookup() to find entries in the ETM register cache. This will help cope with corrected contents of that cache, which doesn't include entires for non-existent registers. git-svn-id: svn://svn.berlios.de/openocd/trunk@2750 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying end-of-line whitespace from most src/*dbrownell2009-09-2111-63/+63
| | | | | | | files; omitted src/httpd git-svn-id: svn://svn.berlios.de/openocd/trunk@2742 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Debug message updates:dbrownell2009-09-201-12/+1
| | | | | | | | | | | | | | | | | | | - Shrink messaging during resets, primarily by getting rid of "nothing happened" noise that hides *useful* information. - Improve: the "no IDCODE" message by identifying which tap only supports BYPASS; and the TAP event strings. Related minor code updates: - Remove two needless tests when examining the chain: we know we have a TAP, and that all TAPs have names. - Clean up two loops, turning "while"s into "for"s which better show what's actually being done. git-svn-id: svn://svn.berlios.de/openocd/trunk@2736 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Added CPUDBG_WCR_BASE definemlu2009-09-191-0/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2734 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Avoid cache invalidation when writing to hardware debug registersmlu2009-09-191-4/+19
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2733 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor behavior fixes for the two JTAG reset events (C/internal,dbrownell2009-09-191-1/+2
| | | | | | | | | | | | | | | | | and Tcl/external): - Reorder so *both* paths (TCK/TMS or TRST) can enable TAPs with ICEpick ... first C code flags TAPs that got disabled, then call any Tcl code that might want to re-enable them. - Always call the C/internal handlers when JTAG operations can be issued; previously that wasn't done when TRST was used. Plus some small cleanups (whitespace, strings, better messaging during debug and on some errors) to reset-related code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2730 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.cmlu2009-09-181-28/+39
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2728 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* srst_gates_jtag option. at91sam9260 needs retesting, and possibly ↵oharboe2009-09-171-1/+12
| | | | | | srst_gates_jtag added to reset_config. Could i.MX27 be a case where srst does not pull trst, but really srst gates jtag clock? git-svn-id: svn://svn.berlios.de/openocd/trunk@2720 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* The "arm9tdmi.c" file is more of a generic ARM9 support file:dbrownell2009-09-171-3/+17
| | | | | | | | | | | - update comments to say so. - update docs to clarify that the "arm9tdmi" command prefix is a misnomer. - bugfix some messages that wrongly assume only ARM9TDMI based processors use this code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2719 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove unused varables (moved to armv7a)mlu2009-09-161-5/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2717 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Use a variable armv7a->debug_base instead of hardedcoded OMAP3530_DEBUG_BASEmlu2009-09-161-28/+31
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2716 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Define debug_base, debug_ap, memory_ap in armv7a_common_tmlu2009-09-151-0/+7
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2714 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Updated mode string list.mlu2009-09-151-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2713 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Definy symbolic values for VA to PA address translation operationsmlu2009-09-151-0/+10
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2712 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Check return values to avoid infinite wait in loop on error.mlu2009-09-141-4/+8
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2709 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Cache invalidation when writing to memorymlu2009-09-141-0/+18
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2708 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* More CortexA8 debug register definitions.mlu2009-09-131-0/+4
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2702 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Fix argument passing in cortex_a8_write_cp.mlu2009-09-131-2/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2701 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-123-26/+40
| | | | | | | | | | | | | | | Cleanup some the downloaded ARM target algorithm code: - Provide more complete disassembly of the DCC bulk write code - Make code blocks "static const", in case GCC doesn't - Fix some tabbing/layout issues - Make some arm7_9_common.h flags be "bool" not "int"; and compact the layout a bit (group most bools together) git-svn-id: svn://svn.berlios.de/openocd/trunk@2698 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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