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* build: fix breakage in building bin2charØyvind Harboe2009-11-221-1/+1
| | | | | | | bin2char build relied on $(builddir) which is not defined for arm-elf X builds at least. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM: arm_set_cpsr() handles T and J bitsDavid Brownell2009-11-227-79/+52
| | | | | | | | | | | | | | Have arm_set_cpsr() handle the two core state flags, updating the CPU state. This eliminates code in various debug_entry() paths, and marginally improves handling of the J bit. Catch and comment a few holes in the handling of the J bit on ARM926ejs cores ... it's unlikely our users will care about Jazelle mode, but we can at least warn of Impending Doom. If anyone does use it, these breadcrumbs may help them to find the right path through the code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: define two register utilitiesDavid Brownell2009-11-228-48/+122
| | | | | | | | | | | | | | Define arm_reg_current() ... returning handle to a given register, and encapsulating the current mode's register shadowing. It's got one current use, for reporting the current register set to GDB. This will let later patches clean up much ARMV4_5_CORE_REG_MODE() nastiness, saving a bit of code. Define and use arm_set_cpsr() ... initially it updates the cached CPSR and sets up state used by arm_reg_current(), plus any SPSR handle. (Later: can also set up for T and J bits.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: simplify CPSR handlingDavid Brownell2009-11-2211-87/+103
| | | | | | | | | | | | | | Stash a pointer to the CPSR in the "struct arm", to help get rid of the (common) references to its index in the register cache. This removes almost all references to CPSR offsets outside of the toplevel ARM code ... except a pair related to the current ARM11 "simulator" logic (which should be removable soonish). This is a net minor code shrink of a few hundred bytes of object code, and also makes the code more readable. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: remove disabled register hooksDavid Brownell2009-11-222-93/+3
| | | | | | | | Minor cleanup of ARM11 register handling: remove disabled register hooks. This should all be handled by shared code, and this stuff is just clutter. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* jtag: remove useless forward declarationsZachary T Welch2009-11-215-140/+76
| | | | | Removes some more useless forward declarations from a few JTAG drivers. Moves interface and bit-bang structure defitions below their callbacks.
* allow jtag interfaces to lack commandsZachary T Welch2009-11-211-2/+5
| | | | | Allow JTAG interface drivers to skip registering an register_commands callback when it will just be empty.
* show script search dirs in debug logAndreas Fritiofson2009-11-211-0/+2
| | | | | | | | | | Add this to ease debugging why the standard scripts aren't found on the default script search path in some build/install enviroments. Especially on Windows it's not straight forward where openocd actually looks for the scripts. Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: pass 'struct reg *' to register r/w routinesDavid Brownell2009-11-208-73/+83
| | | | | | | | | | | | | | | | Implementations need to access the register struct they modify; make it easier and less error-prone to identify the instance. (This removes over 10% of the ARMV4_5_CORE_REG_MODE nastiness...) Plus some minor fixes noted when making these updates: ARM7/ARM9 accessor methods should be static; don't leave CPSR wrongly marked "dirty"; note significant XScale omissions in register handling; and have armv4_5_build_reg_cache() record its result. Rename "struct armv4_5_core_reg" as "struct arm_reg"; it's used for more than those older architecture generations. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM7/ARM9: remove old "debug commands"David Brownell2009-11-201-130/+0
| | | | | | | | | | | | | | | Remove two commands that were documented as "debug commands" and where "you probably don't want to use this". We never intended to support them, and at least one problem report boiled down to using this when it shouldn't have been used. Update the docs on the existing register commands to talk a bit more about register access and cache behavior. (Those debug commands existed largely to *bypass* the cache.) And fix some minor doc goofs that snuck in with recent changes, renaming "armv4_5" as "arm" and "arm9tdmi" as "arm9". Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* maintain command lists in sorted orderZachary T Welch2009-11-201-7/+17
| | | | | Use insertion sort to the command link lists. The only practical effect of this is to order the output of the new 'help' command.
* add add_help_text command handlerZachary T Welch2009-11-202-44/+67
| | | | | | | | | | Rewrite means for scripts to register help text for commands. These cause the new commands to be stored in the command heirarchy, with built-in commands; however, they will never be invoked there because they do not receive a command handler. The same trick is used for the Jim commands. Remove the old helpers that were used to register commands.
* provide command context during cmd_initZachary T Welch2009-11-201-0/+2
| | | | | | For the startup.tcl code to use built-in commands, the context must be associated with the interpreter temporarily. This will be required to add help text.
* improve 'help' commandZachary T Welch2009-11-203-20/+55
| | | | | | | | | | | Rewrites 'help' command in C, using new 'cmd_help' for display. Adds the built-in 'help' COMMAND_HANDLER to provide better output than the TCL-based script command (e.g. heirarchical listing of commands). The help string is stored in the command structure, though it conitnues to be pushed into the Jim environment. The current idiomatic usage suggests the addition of a usage field as well, to provide two levels of detail for users to consume (i.e. terse usage list, or verbose help).
* factor help script command into partsZachary T Welch2009-11-201-28/+34
| | | | | | | | Creates a helper function, cmd_help, which displays the help string for a single command. Presently, it is called from the loop in help. The routine has been extended to allow indentation of command groups, so an improved help command can improve the display of information.
* refactor command registrationZachary T Welch2009-11-203-83/+118
| | | | | | | | | Refactors the command registration to use helpers to simplify the code. The unregistration routines were made more flexible by allowing them to operate on a single command, such that one can remove all of a commands children in one step (perhaps before adding back a 'config' subcommand that allows getting the others back). Eliminates a bit of duplicated code and adds full API documentation for these routines.
* change command_find helper interfaceZachary T Welch2009-11-201-4/+3
| | | | Avoid requiring double pointers where a single would suffice.
* factor script_command argv allocationZachary T Welch2009-11-201-27/+38
| | | | Splits argument allocation out from script command, reusing free() code.
* fix flash/nand name parsingZachary T Welch2009-11-201-1/+3
| | | | | Start driver.num check from end, and make sure the numeric part is actually a number. Fix problems trying to parse bank names.
* Cortex-A8: better context restoreDavid Brownell2009-11-191-13/+67
| | | | | | | The previous version never wrote dirty registers for non-current CPU modes ... fix that. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: mode supportDavid Brownell2009-11-191-30/+116
| | | | | | | | | | | | | | | | We *should* be able to read and write registers in any core mode, instead of being stuck with whatever mode the core was when we entered debug state. This patch makes them work. Note that the current restore_context() only handles the current mode; writing to other-mode registers is a NOP without a followup patch fixing that. Also, that SPSR access needed some bugfixes; it was confused with CPSR. Secure monitor mode also seems dubious; there's probably more to be done before that's sufficiently understood by the debugger. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: create/use register_cache_invalidate()David Brownell2009-11-1914-77/+47
| | | | | | | | | | | | | | | Create a generic register_cache_invalidate(), and use it to replace three all-but-identical core-specific routines: - armv4_5_invalidate_core_regs() - armv7m_invalidate_core_regs - mips32_invalidate_core_regs() too. Make cache->num_regs be unsigned, avoiding various errors. Net code shrink and simplification. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* NAND verify doesn't advance.Dean Glazeski2009-11-191-1/+1
| | | | | | Fix to move the device address up as the contents are verified. Signed-off-by: Zachary T Welch <zw@superlucidity.net>
* add support for naming NAND banksZachary T Welch2009-11-192-3/+11
| | | | | Requires users to name their nand banks, allowing them to be used instead of bank numbers in script commands.
* refactor handle_nand_device_commandZachary T Welch2009-11-191-62/+62
| | | | | | | | | Move bulk of for-loop to a new static command helper function. Adds handle_nand_list_drivers command handler, registered as 'nand drivers'. Improves command help text and error reporting.
* add support for naming flash banksZachary T Welch2009-11-192-2/+10
| | | | | Requires users to name their flash banks, allowing them to be used instead of bank numbers in script commands.
* refactor handle_flash_bank_commandZachary T Welch2009-11-191-17/+13
| | | | | | | | Move variables to point of first use, reducing their scope. Add driver_name temporary to help arguments be changed later. Eliminates the useless 'found' variable, changing the code to terminate the loop immediate and return its success.
* rename flash and nand command helpersZachary T Welch2009-11-1913-44/+44
| | | | | | | After adding support for referencing banks by name, renames the COMMAND_HELPERs appropriately: flash_command_get_bank_by_num -> flash_command_get_bank nand_command_get_device_by_num -> flash_command_get_device
* allow flash/nand banks commands to accept namesZachary T Welch2009-11-197-4/+154
| | | | | | | | | | | | | | | | Add get_flash_bank_by_name (and get_nand_device_by_name) helpers to retrieves struct flash_bank * (struct nand_device *) given a driver name and an (optional) driver-specific bank index. These are used to extend flash_command_get_bank_by_num (and nand_command_get_device_by_num) to allow all flash (nand) commands to reference defined banks by name, not just by number. To avoid some code duplication, add the flash/common.[ch] files to hold functionality common to both types driver. The first two methods are helpers for the above routines to find a bank specified by a "name" or "name.index" string. get_flash_name_index() finds the '.index' portion, while flash_driver_name_matches() performs the string portion matching.
* ARM: remove per-register mallocDavid Brownell2009-11-192-1/+2
| | | | | | | Just pre-allocate memory for the cached register value. Shrinks heap overhead; increases locality-of-reference. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: streamline register initDavid Brownell2009-11-191-74/+88
| | | | | | | | | Combine register names with other per-register data into a single template structure. This saves space, and makes it easier to change how registers get handled (by shrinking the number of places that care about cache indices). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: parts of examine() run just onceDavid Brownell2009-11-191-4/+15
| | | | | | | | | The examine() method has some conceptual breakage. Cope with it by manually splitting out the run-once parts from the after-each-reset parts ... this gets rid of memory leaks and speeds up resets after the first one. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* nand_fileio_parse_args parses wrong param for sizeDean Glazeski2009-11-191-1/+1
| | | | | | | This changes the size parameter from argv[2] to argv[3], which is what it's supposed to be. Signed-off-by: Zachary T Welch <zw@superlucidity.net>
* ARMv7-A: use standard ARM core statesDavid Brownell2009-11-195-31/+43
| | | | | | | | | | | | | | | We don't want an ARMv7-specific core state enumeration just to add ThumbEE state. Update the generic stuff to handle that, and replace the V7-specific bits with it. For Cortex-A8: on debug entry, check both the T and J bits instead of just the T bit. When the J bit is set, set the right state and warn appropriately. (And while we're at it, move the generic arm struct to the front of the v7a structure, for somewhat better code generation.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7-A: use standard ARM core_mode symbolsDavid Brownell2009-11-192-16/+3
| | | | | | | | | The only way ARMv7-A modes differ from ARMv4/ARMv5 flavors is that v7-A is allowed to include "Secure monitor" support. That's now handled by our standard top-level ARM code ... so phase out the stuff that's specific to ARMv7-A. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fix zy1000 command handlerZachary T Welch2009-11-181-13/+11
| | | | | | Rewrite ZY1000 power command handler to use new macros, simplify logic. Remove unused port command handler declaration.
* remove fast command and jim_global_longZachary T Welch2009-11-183-35/+2
| | | | | | | | Removing the fast command eliminates the fast_and_dangerous global, which was used only by arm7_9_common as an initializer. The command is not called in the tree; instead, more explicit commands are used. The jim_global_long function was not used anywhere in the tree.
* update src/hello.c with parsing examplesZachary T Welch2009-11-181-1/+54
| | | | | | | Adds the foo/bar commands to provide more working examples of command argument parsing, including the new handle_command_parse_bool helper. Updates hello command help text to provide useful information.
* change all bool parsers to accept any valueZachary T Welch2009-11-182-6/+5
| | | | | | | | | This patch changes the behavior of all boolean parsing callers to accept any one of "true/enable/on/yes/1" or "false/disable/off/no/0". Since one particular pair will be most appropriate in any given situation, the specific macros should continue to be used in order to display the most informative error messages possible.
* add handle_command_parse_bool command helperZachary T Welch2009-11-183-51/+69
| | | | | | | | | Rewrite arm11_handle_bool to provide a generic on/off command helper. Refactors COMMAND_PARSE_BOOL to use new command_parse_bool helper, which gets reused by the new command_parse_bool_any helper. This later helper is called by the new command helper function to accepts any on/off, enable/disable, true/false, yes/no, or 0/1 parameter.
* use COMMAND_PARSE_ENABLE macro where appropriateZachary T Welch2009-11-186-158/+41
| | | | | | | | Updates all command parsing of simple "enable" and "disable" arguments. A few case in the tree use a tri-state or extended arguments, which cannot use this simple macro. Simlifies the xscale icache/dcache command handler logic.
* use COMMAND_PARSE_ON_OFF where appropriateZachary T Welch2009-11-185-50/+17
| | | | Updates all command parsing of "on" and "off" arguments.
* add COMMAND_PARSE_BOOL macro and friendsZachary T Welch2009-11-181-0/+28
| | | | | | | | | | | | Adds several macros similar to COMMAND_PARSE_NUMBER, but for parsing boolean command arguments. Two flavors are provided to provide drop-in compatibility with existing code, allow for the elimination of a lot of code bloat while improving the error checking and reporting. COMMAND_PARSE_ON_OFF parses "on"/"off" command parameters. COMMAND_PARSE_ENABLE parses "enable"/"disable" command parameters. Both print the error and return an error out of the calling function.
* ARM: rework "arm reg" output for new modeDavid Brownell2009-11-181-35/+113
| | | | | | | | | | | | | | | | Change the layout to show the "Secure Monitor" registers too, when they're present. Instead of lining registers for each of six (or seven) modes up in adjacent vertical columns, display each mode's registers (or shadows) in a single block, avoiding duplicate value displays. This also lets us shrink the line length to fits in standard 80 character lines ... six or seven 18-character columns can't fit. Relabel "r13" as "sp", so it's more meaningful. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: xPSR handling updatesDavid Brownell2009-11-181-17/+20
| | | | | | | | | | When we read the CPSR on debug entry, update the CPSR cache in all cases, not just when the current processor state is User or System. Plus minor cleanup of how the (too-many) other registers' cache entries get updated. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add a default full_context() methodDavid Brownell2009-11-182-12/+27
| | | | | | | | | | | | If the core doesn't provide an optimized version of this method, provide one without core-specific optimizations. Use this to make Cortex-A8 support the "arm reg" command. Related: make the two register access methods properly static, have the "set" log a "not halted" error too, and make sure that the "valid" flag is set on successful reads. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: simplify ARMv7-A register handlingDavid Brownell2009-11-183-188/+50
| | | | | | | | | | | | | | | | | | | ARMv7-A doesn't need to duplicate all the standard ARM code for register handling. - Switch Cortex-A8 to use the standard register code - Remove duplicated infrastructure from ARMv7-A - Have ARMv7-A arch_state() show CPSR, like other ARMs Add comments to show where the Cortex-A8 isn't actually doing the right thing for register reads/writes, unless core happens to be in the right mode to start with. (Looks like maybe there may be generic confusion between saved/current PSR values in all the ARM code ...) Make related ARMv7-A and Cortex-A8 symbols properly static. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: setup "secure monitor mode" shadow regsDavid Brownell2009-11-182-21/+53
| | | | | | | | | | | | | Teach the "armv4_5" register code to understand about the secure monitor mode: - Add the other three shadowed registers to the arrays - Support another internal mode number (sigh) in mappings - Catch malloc/calloc failures building that register cache This should kick in for Cortex-A8 and ARM1176. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add "core_type" field to "struct arm"David Brownell2009-11-184-5/+31
| | | | | | | | | | It's used to flag cores with the "TrustZone" extension, and is used in subsequent patches to set up support for the registers shadowed by its new secure monitor mode. The ARM1176 and Cortex-A8 both support this new mode. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fix segfault at startupZachary T Welch2009-11-181-1/+1
| | | | | | | | The previous changes to move the startup TCL code resulted in segfaults during startup. This seemingly innocuous patch fixes the problem. I would explain why changing from 'foo[]' to '*foo' caused this issue, but the difference seems superficial. For now, this hot fix will do, but this issue might bear further scrutiny.
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