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* cfg: add Avalue RSC-W910 configSpencer Oliver2010-07-131-0/+62
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* at91sam3s* supportOlaf Lüke2010-06-251-0/+3
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* am3517 evm: use physical write to memory while target is runningØyvind Harboe2010-06-221-3/+3
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* board: add alpha am3517evm ti board config fileØyvind Harboe2010-06-221-0/+97
| | | | | | | Signs of life: reset(kinda), halt, resume and memory display/modify. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfg: update stm32 performance stick configSpencer Oliver2010-05-211-1/+8
| | | | | | | | | - As this is a complete unit, including jtag we might as welli nclude the jtag cfg. - Add missing id for the str750 that is also in the jtag chain. - Reduce jtag startup speed to 500kHz. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* board: dm355evm.cfg SDTIMR0/1 minor naming fixJon Povey2010-05-211-1/+1
| | | | | | | Register name fix; ref. TI document sprueh7d Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* reset: fix reset halt bugGary Carlson2010-05-191-23/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I was finally able to figure out the cause of this problem. There are two parts to the patch. The first patch modifies the configuration file I originally generated for the Atmel AT91SAM9G20 board and achieves the following: +++ Splits the reset-init handler into a reset-start handler for some of the initial configuration activities and keeps the remainder in the reset-init handler as was the case before. This was the real issue that was causing the timing problems I identified before. This solution was confirmed with an o-scope on actual target hardware. +++ Adds a new instruction in the reset-start handler to disable fast memory accesses in the reset-start handler. When the target jtag clock is started out at 2 kHz during system clock initialization, memory writes (i.e. register write to enable external reset pin -- basically to RSTC_MR) are naturally slow and cause GDB keep-alive issues (refer to PATCH 2/2 for additional fixes). +++ Modifies the configuration file to use srst_only reset action. The reset-start/reset-init handler split also now allows the correct behavior to be used in the configuration file (previously had to use both SRST and TRST even though only SRST is actually used and connected on the evaluation board). +++ Adds external NandFlash configuration support to take advantage of flash driver added earlier. Doesn't fix any bugs but adds functionality that was marked as TBD before and thrown in when I did other work on the configuration file. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* at91rm9200 : reset_config should go to the board config fileMarc Pignat2010-05-181-0/+3
| | | | | | Let other boards do other things with srst and trst. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* scripts: update flash bank namesSpencer Oliver2010-05-133-6/+6
| | | | | | As the flash bank name is now unique update the scripts to suit. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* zy1000.cfg: gdb connect will fail first time without gdb-attachØyvind Harboe2010-05-121-0/+5
| | | | | | | gdb-attach does a reset init to make sure that the CFI probe will succeed upon first gdb connect. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfg: add stm32eval board configsSpencer Oliver2010-05-074-1/+29
| | | | | | | | Increase working area for stm3210e_eval.cfg. Add new configs for the following boards: STM321000B-EVAL, STM32100C-EVAL, STM32100B-EVAL Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* zy1000: it has a CFI chip, no need for the ecosflash driverØyvind Harboe2010-04-301-1/+2
| | | | | | | The ecosflash driver is no longer used by any of the config scripts. It is more useful to get more testing of CFI. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* Add Voipac PXA270 module supportMarek Vasut2010-04-261-0/+12
| | | | | | This patch adds support for the Voipac PXA270 module. Including NOR flash. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* telo: update configuration scripts to matched master branchmichal smulski2010-04-241-1/+1
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* TCL SCRIPTS: fix command nameAntonio Borneo2010-04-153-3/+3
| | | | | | | Some tcl script has underline between the words "flash bank" resulting in 'invalid command name "flash_bank"'. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* TCL scripts: update to current "flash bank" syntaxAntonio Borneo2010-03-2611-19/+23
| | | | | | | | | | | | | | While "flash bank" syntax has been changed long ago, several tcl script are still not fully update. Fix following cases related with "cfi" driver: - syntax error: the mandatory <name> parameter is missing - warning: the <target> parameter is a number, instead of the target name - the comment line above the command does not report actual syntax Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* PIC32: add Microchip Explorer16 cfgSpencer Oliver2010-03-162-4/+13
| | | | | | | - add Microchip Explorer16 cfg using PIC32MX360F512L PIM. - remove reset config from PIC32 target cfg. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* rename jtag_nsrst_assert_width as adapter_nsrst_assert_widthDavid Brownell2010-03-151-1/+1
| | | | | | | | | | | Globally rename "jtag_nsrst_assert_width" as "adapter_nsrst_assert_width", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* rename jtag_nsrst_delay as adapter_nsrst_delayDavid Brownell2010-03-1515-16/+16
| | | | | | | | | | | Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* rename jtag_khz as adapter_khzDavid Brownell2010-03-1518-27/+27
| | | | | | | | | | | Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. (We may want to update it to include a nag message too.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* doc: not all debug adapters are "dongles"David Brownell2010-03-051-2/+3
| | | | | | | | | | | | | | | | | Talk more about "debug adapters" instead of only "dongles". Not all adapters are discrete widgets; some are integrated onto boards. If we only talk about "dongles" we rule out many valid setups, and help confuse some users (who may be using Dongle-free environments). Also start bringing out the point that JTAG isn't the only transport protocol, even though OpenOCD historically presumes "all is JTAG". (Not all debug adapters are JTAG adapters, or JTAG-only adapters.) Plus a few minor fixes (spelling etc) in the vicinity of those changes, and updates about FT2232H clocking issues (they can go faster than the older chips, and can support adaptive clocking). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* LPC1768 updates, IAR board supportDavid Brownell2010-03-021-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some issues with the generic LPC1768 config file: - Handle the post-reset clock config: 4 MHz internal RC, no PLL. This affects flash and JTAG clocking. - Remove JTAG adapter config; they don't all support trst_and_srst - Remove the rest of the bogus "reset-init" event handler. - Allow explicit CCLK configuration, instead of assuming 12 MHz; some boards will use 100 Mhz (or the post-reset 4 MHz). - Simplify: rely on defaults for endianness and IR-Capture value - Update some comments too Build on those fixes to make a trivial config for the IAR LPC1768 kickstart board (by Olimex) start working. Also, add doxygen to the lpc2000 flash driver, primarily to note a configuration problem with driver: it wrongly assumes the core clock rate never changes. Configs that are safe for updating flash after "reset halt" will thus often be unsafe later ... e.g. for LPC1768, after switching to use PLL0 at 100 MHz. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Add board/redbee-usb.cfgMariano Alvira2010-02-281-0/+8
| | | | | | | | | | | The Redbee USB is a small form-factor usb stick from Redwire, LLC (www.redwirellc.com/store), built around a Freescale MC13224V ARM7TDMI + 802.15.4 radio (plus antenna). It includes an FT2232H for debugging, with Channel B connected to the mc13224v's JTAG interface (unusual) and Channel A connected to UART1. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* add board/redbee-econotag.cfg and JTAG supportMariano Alvira2010-02-271-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | The Redbee Econotag is an open hardware development kit from Redwire, LLC (www.redwirellc.com/store), for the Freescale MC13224V ARM7TDMI + 802.15.4 radio. It includes both an MC13224V and an FT2232H (for JTAG and UART support). It has flexible power supply options. Additional features are: - inverted-F pcb antenna - 36 GPIO brought out to 0.1" pin header (includes all peripheral pins) - Reset button - Two push buttons (on kbi1-5 and kbi0-4) - USB-A connector, powered from USB - up to 16V external input - pads for optional buck inductor - pads for optional 32.768kHz crystal - 2x LEDS on TX_ON and RX_ON [ dbrownell@users.sourceforge.net: shrink lines; texi ] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* CSB337 board cleanup (quasi-regression)David Brownell2010-02-201-0/+2
| | | | | | | | Get rid of new nasty warning: NOTE! Severe performance degradation without fast memory access enabled... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target library: configuration files for openocd tested with Atmel SAM-ICE V6 ↵Viktar Palstsiuk2010-02-111-0/+75
| | | | | | JTAG. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* scripts: Phytec/LPC2350 config scriptsEthan Eade2010-02-041-0/+88
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* AT91R40008/Ethernut 3 configurationHarald Kipp2010-02-021-0/+86
| | | | | | | | | | Moved board specific settings from target/at91r40008.cfg to a new file board/ethernut3.cfg. Set correct CPUTAPID. Reset delay increased, see MIC2775 data sheet. Increased work area size from 16k to 128k. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* board configs -- unique names for flash chipsDavid Brownell2010-01-202-8/+6
| | | | | | | | Don't give the same names to both flash chips on two OMAP boards. For OSK, enable DCC downloads (removing a warning). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Added Open-BLDC board config file.Piotr Esden-Tempski2009-12-291-0/+7
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* Fix Luminary FT2232 layout docs/configsDavid Brownell2009-12-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of this patch updates documentation and comments for various Luminary boards, supporting two bug fixes by helping to make sense of the current mess: - Recent rev C lm3s811 eval boards didn't work. They must use the ICDI layout, which sets up some signals that the older boards didn't need. This is actually safe and appropriate for *all* recent boards ... so just make "luminary.cfg" use the ICDI layout. - "luminary-lm3s811.cfg", was previously unusable! No VID/PID; and the wrong vendor string. Make it work, but reserve it for older boards where the ICDI layout is wrong. - Default the LM3748 eval board to "luminary.cfg", like the other boards. If someone uses an external JTAG adapter, all boards will use the same workaround (override that default). The difference between the two FT2232 layouts is that eventually the EVB layout will fail cleanly when asked to enable SWO trace, but the ICDI layout will as cleanly be able to enable it. Folk using "luminary.cfg" with Rev B boards won't see anything going wrong until SWO support is (someday) added. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* create tcl/board/dm365evm.cfgDavid Brownell2009-12-271-0/+147
| | | | | | | | | | | | | | | | This config is only lightly tested, and doesn't work well yet; but it's a start. * Notably missing is PLL configuration, since each DaVinci does that just a bit differently; and thus DDR2 setup. * The SRST workaround needed for the goof in the CPLD's VHDL depends on at least the not-yet-merged patch letting ARM9 (and ARM7) chips perform resets that don't use SRST. So this isn't yet suitable for debugging U-Boot. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Olimex SAM9-L9260 board configuration update.Dean Glazeski2009-12-261-0/+52
| | | | | | | | This updates the board configuration for the SAM9-L9260 board with the configuration for the on-board NAND and dataflash. Included are commands for configuring the AT91SAM9 NAND flash driver. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* more tcl/{board,target} cleanupDavid Brownell2009-12-157-16/+41
| | | | | | | | | | | | | | Remove more remnants of the old "jtag_device" syntax. Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity. Remove various non-supported "-variant" target options; they're not needed often at all. Flag some of the board files as needing to have and use target files for the TAP and target declarations. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* lm3748: use new Stellaris config fileDavid Brownell2009-12-141-4/+1
| | | | | | Use the new file, and remove the old target/lm3s3748.cfg one. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Tcl and doc: update to match new 'arm mcr ...' etcDavid Brownell2009-12-014-6/+6
| | | | | | Make them match the C code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: at91eb40a.cfg is a board, not a target.Øyvind Harboe2009-12-011-0/+65
| | | | | | | Also updated to use target name when creating flash and set jtag_khz to 16000. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm926ejs: fix gaffe when converting from arm926ejs cp15 to mcrØyvind Harboe2009-11-233-3/+3
| | | | | | the first arg is the register number 15 = cp15. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm926ejs: retire cp15 commands, handled by mrc/mcr.Øyvind Harboe2009-11-233-3/+3
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* update 'nand device' usage in scriptsZachary T Welch2009-11-193-4/+8
| | | | Add $_FLASHNAME variable to update 'nand device' command syntax.
* update 'flash bank' usage in scriptsZachary T Welch2009-11-1918-23/+46
| | | | | Sets $_FLASHNAME to "$_CHIPNAME.flash" and passes it as the first argument to 'flash bank'.
* ARM: "armv4_5" command prefix becomes "arm"David Brownell2009-11-161-1/+1
| | | | | | | | | | Rename the "armv4_5" command prefix to straight "arm" so it makes more sense for newer cores. Add a simple compatibility script. Make sure all the commands give the same "not an ARM" diagnostic message (and fail properly) when called against non-ARM targets. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target.cfg: (re)move some bogus reset_config linesDavid Brownell2009-11-101-0/+3
| | | | | | | General rule, this is all board-specific and doesn't belong in target config files. Some of these were just cosmetic. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: remove old mrc/mcr commandsØyvind Harboe2009-11-101-3/+3
| | | | | | Switch to new commands in config scripts Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* telo.cfg: fix search pathsØyvind Harboe2009-11-101-4/+4
| | | | | | | Add the missing "target/" prefix for scripts in the target folder. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* finish removing deprecated/obsolete commandsDavid Brownell2009-11-092-2/+2
| | | | | | | | | | | | | | | | | | | | It's been about a year since these were deprecated and, in most cases, removed. There's no point in carrying that documentation, or backwards compatibility for "jtag_device" and "jtag_speed", around forever. (Or a few remnants of obsolete code...) Removed a few obsolete uses of "jtag_speed": - The Calao stuff hasn't worked since July 2008. (Those Atmel targets need to work with a 32KHz core clock after reset until board-specific init-reset code sets up the PLL and enables a faster JTAg clock.) - Parport speed controls don't actually work (tops out at about 1 MHz on typical HW). - In general, speed controls need to live in board.cfg files (or sometimes target.cfg files), not interface.cfg ... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target.cfg: remove "-work-area-virt 0"David Brownell2009-11-088-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The semantics of "-work-area-virt 0" (or phys) changed with the patch to require specifying physical or virtrual work area addresses. Specifying zero was previously a NOP. Now it means that address zero is valid. This patch addresses three related issues: - MMU-less processors should never specify work-area-virt; remove those specifications. Such processors include ARM7TDMI, Cortex-M3, and ARM966. - MMU-equipped processors *can* specify work-area-virt... but zero won't be appropriate, except in mischievous contexts (which hide null pointer exceptions). Remove those specs from those processors too. If any of those mappings is valid, someone will need to submit a patch adding it ... along with a comment saying what OS provides the mapping, and in which context. Example, say "works with Linux 2.6.30+, in kernel mode". (Note that ARM Linux doesn't map kernel memory to zero ...) - Clarify docs on that "-virt" and other work area stuff. Seems to me work-area-virt is quite problematic; not every operating system provides such static mappings; if they do, they're not in every MMU context... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* PXA255: support Intel "Lubbock" platformDavid Brownell2009-11-041-0/+110
| | | | | | | | | | | | | | | | | | Config for Intel's "Lubbock" PXA255 development board. Even more so than the PXA255 itself, this is obsolete. AFAIK this was the first generally available development platform for PXA255. Intel stopped providing these after other devel boards became available. One interesting thing about this board from the OpenOCD perspective is probably its flash configuration. Each bank is 32 bits wide, built from two 16-bit StrataFlash chips wired in parallel. This doubles throughput ... it reads/writes 32 bits in the time a single chip takes to write just 16 bits. This conf mostly works, given XScale bugfixes, but has some issues (notably: no access to the on-board SDRAM) flagged by FIXMEs. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* balloon3 board base configWookey2009-10-261-0/+13
| | | | | | | | | | | This is the very basic board config for the balloon3 board cpu JTAG channel. The rest of the config comprises another 14 .cfg files which I suspect openocd doesn't really want all of. I'm still not sure how to deal with this. I'll post another mail/patch to discuss. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fix syntax of mww phys.Øyvind Harboe2009-10-254-33/+33
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