| Commit message (Collapse) | Author | Age | Files | Lines |
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layout to be ktlink_jtag, added ktlink_swd layout and initialization routine. Updated existing configuration file kt-link.cfg to match ktlink_jtag layout.
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working in SWD mode.
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The following mini6410/tiny6410 functions are available:
init_6410 - initialize clock, timer, DRAM
init_6410_flash - initializes NAND flash support
install_6410_uboot - copies u-boot image into RAM and runs it
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The beagleboard icepick jtag tap id's vary.
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Signed-off-by: Luca Ellero <lroluk@gmail.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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for
- pio
- pmc
- rstc
- wdt
- sdramc
- smc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Aaron Carroll <aaronc@ok-labs.com>
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Soft breakpoints are currently broken if the MMU is enabled due to incorrect
cache flushing. Until this is fixed, force the use of hardware breakpoints.
Signed-off-by: Aaron Carroll <aaronc@ok-labs.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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all at91sam9 are nearly the same except sram and soc name
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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tested with jlink sam-ice v5 while loading barebox
(gdb) load
Loading section .text, size 0x2f190 lma 0x21f00000
Loading section .rodata, size 0x931c lma 0x21f2f190
Loading section .data, size 0x29e8 lma 0x21f384ac
Loading section .barebox_cmd, size 0x78c lma 0x21f3ae94
Loading section .barebox_initcalls, size 0x80 lma 0x21f3b620
Start address 0x21f00000, load size 243360
Transfer rate: 26 KB/sec, 13520 bytes/write.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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stm32-discovery evaluation board (STM32F100RBTB6):
reading device id register (0xE0042000) returns 0x10010420
Signed-off-by: Luca Ellero <lroluk@gmail.com>
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PandaBoard REV EA1 (Panda Early Adopter Program) has a different ID.
This patch add alternate REV EA1 TAP id to configuration file
Signed-off-by: Luca Ellero <lroluk@gmail.com>
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* Write to the PRM reset control register should have been 'phys';
* Setup empty reset-assert handlers for the M3's, since the board-level reset
takes care of them;
* Remove the dbginit cruft, because it gets called implicitly on reset.
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
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Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
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Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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specific targets (setup_lpc<number>) take core clock and adapter clock as parameters. This way "constant" parameters (flash size and type, CPUTAPID, etc.) do not need to be copied if one wishes to change the "variable" parameters - like the core clock or adapter clock - in a board config file or somewhere else.
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
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Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
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Signed-off-by: Michael Schwingen <michael@schwingen.org>
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Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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Define a proc which PCBs can easily override.
Also demonstrates how to add multiple TAP exepcted-id's
using arguments.
Added 0x3f0f0f0f as expected TAP-id. Old LPC2148 silicon
I happened to have on my desk?
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Make consistent use of hex memory size for flashing.
Delete stm32f10x_128k_eval.cfg. It has no product reference
nor any settings in it.
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ST recently rewamped (screwed up) their web site and broke all links.
Also match the chip names with those on the web site product
descriptions.
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