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author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-10 20:12:35 +0000 |
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committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-10 20:12:35 +0000 |
commit | 32eea2a2542987dccdea08664e77ed00c584c945 (patch) | |
tree | c95d3a969df95336ea50d1e90c75d7974f708b34 | |
parent | cce7512ca908ab93b4effa77cb9dd01ac44edc81 (diff) | |
download | openocd_libswd-32eea2a2542987dccdea08664e77ed00c584c945.tar.gz openocd_libswd-32eea2a2542987dccdea08664e77ed00c584c945.tar.bz2 openocd_libswd-32eea2a2542987dccdea08664e77ed00c584c945.tar.xz openocd_libswd-32eea2a2542987dccdea08664e77ed00c584c945.zip |
more target scripts wip.
git-svn-id: svn://svn.berlios.de/openocd/trunk@488 b42882b7-edfa-0310-969c-e2dbd0fdcd60
-rw-r--r-- | src/target/Makefile.am | 2 | ||||
-rw-r--r-- | src/target/event/wi-9c_reset.script | 14 |
2 files changed, 15 insertions, 1 deletions
diff --git a/src/target/Makefile.am b/src/target/Makefile.am index 1f437f5b..83379381 100644 --- a/src/target/Makefile.am +++ b/src/target/Makefile.am @@ -23,7 +23,7 @@ nobase_dist_pkglib_DATA = xscale/debug_handler.bin event/at91eb40a_reset.script target/at91r40008.cfg target/lpc2148.cfg target/lpc2294.cfg target/sam7s256.cfg \ target/sam7x256.cfg target/str710.cfg target/str912.cfg target/nslu2.cfg target/pxa255_sst.cfg \ target/pxa255.cfg target/zy1000.cfg event/zy1000_reset.script event/at91sam9260_reset.script target/at91sam9260.cfg \ - target/wi-9c.cfg event/wi-9c_reset.script event/pxa255_reset.script target/stm32.cfg + target/wi-9c.cfg event/wi-9c_reset.script event/pxa255_reset.script target/stm32.cfg target/xba_revA3.cfg event/xba_revA3.script diff --git a/src/target/event/wi-9c_reset.script b/src/target/event/wi-9c_reset.script index cd483701..abb50216 100644 --- a/src/target/event/wi-9c_reset.script +++ b/src/target/event/wi-9c_reset.script @@ -54,3 +54,17 @@ mww 0xA0700120 0x00084280 # Enable buffer access mww 0xA0700140 0x00084280 # Enable buffer access
mww 0xA0700160 0x00084280 # Enable buffer access
+#Set byte lane state (static mem 1)"
+mww 0xA0700220, 0x00000082
+#Flash Start
+mww 0xA09001F8, 0x50000000
+#Flash Mask Reg
+mww 0xA09001FC, 0xFF000001
+mww 0xA0700028, 0x00000001
+
+# RAMAddr = 0x00020000
+# RAMSize = 0x00004000
+
+# Set the processor mode
+reg cpsr 0xd3
+
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