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authorDavid Brownell <dbrownell@users.sourceforge.net>2010-07-19 16:08:09 -0400
committerDavid Brownell <db@helium.(none)>2010-07-19 16:08:09 -0400
commit612184176fee6333e5372c4637e3cf54628ee416 (patch)
tree30a349defd36740119bcf99d1163eebb38f8eb6f
parent8dbe367c53682b1217f0f5d599a7a79bf0415796 (diff)
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more careful luminary init
Set up more of the Luminary-specific signals, and stop cloning a few of the JTAG defaults. More comments too. Still leaves the "dap info 0" bugs unresolved (presumably coupled to this particular adapter family) where TPIU, ITM, DWT, and other debug modules wrongly display as extra NVICs. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
-rw-r--r--src/jtag/drivers/ft2232.c19
1 files changed, 12 insertions, 7 deletions
diff --git a/src/jtag/drivers/ft2232.c b/src/jtag/drivers/ft2232.c
index 4dcc045c..1a0eb4b5 100644
--- a/src/jtag/drivers/ft2232.c
+++ b/src/jtag/drivers/ft2232.c
@@ -316,7 +316,7 @@ static uint8_t nSRSTnOE;
/** the layout being used with this debug session */
static const struct ft2232_layout *layout;
-/** default bitmask values ddriven on DBUS: TCK/TDI/TDO/TMS and GPIOL(0..4) */
+/** default bitmask values driven on DBUS: TCK/TDI/TDO/TMS and GPIOL(0..4) */
static uint8_t low_output = 0x0;
/* note that direction bit == 1 means that signal is an output */
@@ -2496,9 +2496,11 @@ static int icdi_jtag_init(void)
/* Most Luminary eval boards support SWO trace output,
* and should use this "luminary_icdi" layout.
*
- * DBUS 0..3 are used for JTAG as usual. GPIOs are used
+ * ADBUS 0..3 are used for JTAG as usual. GPIOs are used
* to switch between JTAG and SWD, or switch the ft2232 UART
- * between (i) the target UART or (ii) SWO trace data.
+ * on the second MPSSE channel/interface (BDBUS)
+ * between (i) the stellaris UART (on Luminary boards)
+ * or (ii) SWO trace data (generic).
*
* We come up in JTAG mode and may switch to SWD later (with
* SWO/trace option if SWD is active).
@@ -2511,18 +2513,21 @@ static int icdi_jtag_init(void)
#define ICDI_JTAG_EN (1 << 7) /* ADBUS 7 (a.k.a. DBGMOD) */
#define ICDI_DBG_ENn (1 << 6) /* ADBUS 6 */
#define ICDI_SRST (1 << 5) /* ADBUS 5 */
-#define ICDI_TDI (1 << 2) /* ADBUS 2 (INPUT) */
+
+ /* GPIOs on second channel/interface (UART) ... */
#define ICDI_SWO_EN (1 << 4) /* BDBUS 4 */
#define ICDI_TX_SWO (1 << 1) /* BDBUS 1 */
+#define ICDI_VCP_RX (1 << 0) /* BDBUS 0 (to stellaris UART) */
nTRST = 0x0;
nTRSTnOE = 0x00;
nSRST = ICDI_SRST;
- nSRSTnOE = 0x20;
+ nSRSTnOE = ICDI_SRST;
- low_output = 0x08 | ICDI_JTAG_EN;
- low_direction = 0xcb | ICDI_JTAG_EN;
+ low_direction |= ICDI_JTAG_EN | ICDI_DBG_ENn;
+ low_output |= ICDI_JTAG_EN;
+ low_output &= ~ICDI_DBG_ENn;
return ftx232_dbus_write();
}