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authorAntonio Borneo <borneo.antonio@gmail.com>2010-04-20 12:15:49 +0800
committerØyvind Harboe <oyvind.harboe@zylin.com>2010-05-16 13:39:47 +0200
commit61bb0d3d235c659eb407a7032aa9ec70a914dc03 (patch)
tree3b57db977bb18b70ba8305064b9807528374c1e3
parent89747f81f22084b255f35d92f709facd3b4553a1 (diff)
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NOR/CFI: identify memory accesses not using "bus_width".
Since NOR flash devices does not handle "byte enable lanes", each read/write access involves the whole "chip_width". When multiple devices are in parallel, usually all chips are enabled during each access. All such cases are compatible with flash accesses at "bus_width" size. Access at "bus_width" size is mandatory for write access to avoid transferring of garbage values to flash. During read access the flash controller should take care, and discard unneeded bytes. Anyway, it is good practice to use "bus_width" size also for read. Every memory access that does not respect "bus_width" size is marked with a "FIXME" comment. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
-rw-r--r--src/flash/nor/cfi.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index f2ea947a..ca2fb0bb 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -1871,6 +1871,7 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
for (i = 0; i < align; ++i, ++copy_p)
{
uint8_t byte;
+ /* FIXME: access flash at bus_width size */
if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
@@ -1890,6 +1891,7 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p)
{
uint8_t byte;
+ /* FIXME: access flash at bus_width size */
if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
@@ -2005,6 +2007,7 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
for (; i < bank->bus_width; ++i, ++copy_p)
{
uint8_t byte;
+ /* FIXME: access flash at bus_width size */
if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
@@ -2137,10 +2140,12 @@ static int cfi_probe(struct flash_bank *bank)
if (bank->chip_width == 1)
{
uint8_t manufacturer, device_id;
+ /* FIXME: access flash at bus_width size */
if ((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK)
{
return retval;
}
+ /* FIXME: access flash at bus_width size */
if ((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK)
{
return retval;
@@ -2150,10 +2155,12 @@ static int cfi_probe(struct flash_bank *bank)
}
else if (bank->chip_width == 2)
{
+ /* FIXME: access flash at bus_width size */
if ((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK)
{
return retval;
}
+ /* FIXME: access flash at bus_width size */
if ((retval = target_read_u16(target, flash_address(bank, 0, 0x01), &cfi_info->device_id)) != ERROR_OK)
{
return retval;
@@ -2543,6 +2550,7 @@ struct flash_driver cfi_flash = {
.write = cfi_write,
.probe = cfi_probe,
.auto_probe = cfi_auto_probe,
+ /* FIXME: access flash at bus_width size */
.erase_check = default_flash_blank_check,
.protect_check = cfi_protect_check,
.info = cfi_info,