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| author | Nicolas Pitre <nico@fluxnic.net> | 2009-10-27 21:19:43 -0400 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-10-27 19:25:54 -0700 |
| commit | 76afa936ba4bfa5a5780dbad562c6637c252524b (patch) | |
| tree | 6dfd18467395b4c38aa332317ceabb6c8370d452 | |
| parent | 39dd68bca649e9275c602fa212f448ae8497f306 (diff) | |
| download | openocd_libswd-76afa936ba4bfa5a5780dbad562c6637c252524b.tar.gz openocd_libswd-76afa936ba4bfa5a5780dbad562c6637c252524b.tar.bz2 openocd_libswd-76afa936ba4bfa5a5780dbad562c6637c252524b.tar.xz openocd_libswd-76afa936ba4bfa5a5780dbad562c6637c252524b.zip | |
ARM: fix single-step of Thumb unconditional branch
Only type 1 branch instruction has a condition code, not type 2.
Currently they're both tagged with ARM_B which doesn't allow for the
distinction.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
| -rw-r--r-- | src/target/arm_simulator.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c index c50a52cd..27957b2f 100644 --- a/src/target/arm_simulator.c +++ b/src/target/arm_simulator.c @@ -317,8 +317,8 @@ int arm_simulate_step_core(target_t *target, uint32_t *dry_run_pc, struct arm_si return retval; instruction_size = 2; - /* check condition code (only for branch instructions) */ - if (instruction.type == ARM_B && + /* check condition code (only for branch (1) instructions) */ + if ((opcode & 0xf000) == 0xd000 && !thumb_pass_branch_condition(sim->get_cpsr(sim, 0, 32), opcode)) { if (dry_run_pc) |