David Brownell <david-b@pacbell.net> "set _TARGETNAME ..." cleanup

git-svn-id: svn://svn.berlios.de/openocd/trunk@2665 b42882b7-edfa-0310-969c-e2dbd0fdcd60

45 files changed, 54 insertions, 49 deletions

diff --git a/tcl/target/aduc702x.cfg b/tcl/target/aduc702x.cfg
index cdbcf456..7e62735d 100644
--- a/tcl/target/aduc702x.cfg
+++ b/tcl/target/aduc702x.cfg
@@ -36,7 +36,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 ##
 ## Target configuration
 ##
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # allocate the entire SRAM as working area
diff --git a/tcl/target/at91eb40a.cfg b/tcl/target/at91eb40a.cfg
index 39fbe095..44f9f8e0 100644
--- a/tcl/target/at91eb40a.cfg
+++ b/tcl/target/at91eb40a.cfg
@@ -34,7 +34,7 @@ reset_config srst_only srst_pulls_trst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 #target configuration
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 # speed up memory downloads
diff --git a/tcl/target/at91r40008.cfg b/tcl/target/at91r40008.cfg
index f8f5d410..47542f6a 100644
--- a/tcl/target/at91r40008.cfg
+++ b/tcl/target/at91r40008.cfg
@@ -28,7 +28,8 @@ reset_config srst_only srst_pulls_trst
 #jtag scan chain
 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
 
 
diff --git a/tcl/target/at91sam3uXX.cfg b/tcl/target/at91sam3uXX.cfg
index 37f6b8ef..cfcc4a4f 100644
--- a/tcl/target/at91sam3uXX.cfg
+++ b/tcl/target/at91sam3uXX.cfg
@@ -29,7 +29,7 @@ if { [info exists CPUTAPID ] } {
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # 16K is plenty, the smallest chip has this much
diff --git a/tcl/target/at91sam7sx.cfg b/tcl/target/at91sam7sx.cfg
index 516a09c7..80186eca 100644
--- a/tcl/target/at91sam7sx.cfg
+++ b/tcl/target/at91sam7sx.cfg
@@ -21,7 +21,7 @@ if { [info exists CPUTAPID ] } {
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
 $_TARGETNAME configure -event reset-init { 
diff --git a/tcl/target/at91sam9260.cfg b/tcl/target/at91sam9260.cfg
index 862633ac..6fc71a31 100644
--- a/tcl/target/at91sam9260.cfg
+++ b/tcl/target/at91sam9260.cfg
@@ -35,7 +35,7 @@ jtag_rclk 3
 # Target configuration
 ######################
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
 
 # Internal sram1 memory
diff --git a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
index f10a021c..11173604 100644
--- a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
+++ b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
@@ -41,7 +41,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 # Target configuration
 ######################
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
 
 $_TARGETNAME invoke-event halted
diff --git a/tcl/target/c100.cfg b/tcl/target/c100.cfg
index ceb8de38..0e72b298 100644
--- a/tcl/target/c100.cfg
+++ b/tcl/target/c100.cfg
@@ -36,7 +36,7 @@ jtag newtap $_CHIPNAME dsp -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_D
 # Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # C100's ARAM 64k SRAM
diff --git a/tcl/target/cs351x.cfg b/tcl/target/cs351x.cfg
index 75d22838..18475ff5 100644
--- a/tcl/target/cs351x.cfg
+++ b/tcl/target/cs351x.cfg
@@ -19,8 +19,9 @@ if { [info exists CPUTAPID ] } {
 jtag newtap $_CHIPNAME cpu  -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 # Create the GDB Target.
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526
+
 # There is 16K of SRAM on this chip
 # FIXME: flash programming is not working by using this work area. So comment this out for now.
 #$_TARGETNAME configure -work-area-virt 0x00000000 -work-area-phys 0x00000000 -work-area-size  0x4000 -work-area-backup 1
diff --git a/tcl/target/epc9301.cfg b/tcl/target/epc9301.cfg
index 6dbb91b3..9eea39b5 100644
--- a/tcl/target/epc9301.cfg
+++ b/tcl/target/epc9301.cfg
@@ -23,7 +23,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 jtag_nsrst_delay 100
 jtag_ntrst_delay 100
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -work-area-virt 0 -work-area-phys 0x80014000 -work-area-size 0x1000 -work-area-backup 1
 
 #flash configuration
diff --git a/tcl/target/feroceon.cfg b/tcl/target/feroceon.cfg
index 552831a8..25d1d133 100644
--- a/tcl/target/feroceon.cfg
+++ b/tcl/target/feroceon.cfg
@@ -21,7 +21,8 @@ if { [info exists CPUTAPID ] } {
 }
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
 
 reset_config trst_and_srst
diff --git a/tcl/target/imx21.cfg b/tcl/target/imx21.cfg
index 3a02cac6..6644ce55 100644
--- a/tcl/target/imx21.cfg
+++ b/tcl/target/imx21.cfg
@@ -28,7 +28,7 @@ jtag newtap $_CHIPNAME cpu  -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_C
 
 
 # Create the GDB Target.
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
 
 arm7_9 dcc_downloads enable
diff --git a/tcl/target/imx27.cfg b/tcl/target/imx27.cfg
index b4dc8a98..f12e8784 100644
--- a/tcl/target/imx27.cfg
+++ b/tcl/target/imx27.cfg
@@ -38,7 +38,7 @@ if { [info exists CPUTAPID ] } {
 jtag newtap $_CHIPNAME cpu  -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 # Create the GDB Target.
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
 $_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 -work-area-size  0x8000 -work-area-backup 1
 # Internal to the chip, there is 45K of SRAM
diff --git a/tcl/target/imx31.cfg b/tcl/target/imx31.cfg
index 3fed2f82..fa7e2d21 100644
--- a/tcl/target/imx31.cfg
+++ b/tcl/target/imx31.cfg
@@ -54,7 +54,7 @@ jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0xf -expected
 # But this conflicts with Diagram 6-13, "3bits ir and drs"
 jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 
diff --git a/tcl/target/imx35.cfg b/tcl/target/imx35.cfg
index d254c603..d7561657 100644
--- a/tcl/target/imx35.cfg
+++ b/tcl/target/imx35.cfg
@@ -43,7 +43,7 @@ jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0x0 -expected
 
 jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 proc power_restore {} { puts "Sensed power restore. No action." } 
diff --git a/tcl/target/is5114.cfg b/tcl/target/is5114.cfg
index c28298c6..be7727db 100644
--- a/tcl/target/is5114.cfg
+++ b/tcl/target/is5114.cfg
@@ -38,7 +38,7 @@ jtag newtap $_CHIPNAME unknown2 -irlen 5 -ircapture 1 -irmask 1
 
 
 #arm946e-s and 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm966e -endian $_ENDIAN  -chain-position $_TARGETNAME  -variant arm966e
 
 $_TARGETNAME configure -event reset-start { jtag_rclk 16 }
diff --git a/tcl/target/ixp42x.cfg b/tcl/target/ixp42x.cfg
index 12ace990..fbb227bb 100644
--- a/tcl/target/ixp42x.cfg
+++ b/tcl/target/ixp42x.cfg
@@ -27,6 +27,6 @@ reset_config srst_only srst_pulls_trst
 
 jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
 
diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg
index 59f11c5d..7afcf712 100644
--- a/tcl/target/lpc1768.cfg
+++ b/tcl/target/lpc1768.cfg
@@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
diff --git a/tcl/target/lpc2103.cfg b/tcl/target/lpc2103.cfg
index cccc16d7..b3a2262f 100644
--- a/tcl/target/lpc2103.cfg
+++ b/tcl/target/lpc2103.cfg
@@ -27,8 +27,7 @@ jtag_ntrst_delay 100
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 # 8kB of internal SRAM
diff --git a/tcl/target/lpc2124.cfg b/tcl/target/lpc2124.cfg
index 4cdbc02c..9430c1b0 100644
--- a/tcl/target/lpc2124.cfg
+++ b/tcl/target/lpc2124.cfg
@@ -32,7 +32,7 @@ jtag_khz 1000
 #jtag scan chain
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
diff --git a/tcl/target/lpc2129.cfg b/tcl/target/lpc2129.cfg
index b224c044..428883d3 100644
--- a/tcl/target/lpc2129.cfg
+++ b/tcl/target/lpc2129.cfg
@@ -32,7 +32,7 @@ jtag_ntrst_delay 100
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
diff --git a/tcl/target/lpc2148.cfg b/tcl/target/lpc2148.cfg
index d367a8f5..0410d366 100644
--- a/tcl/target/lpc2148.cfg
+++ b/tcl/target/lpc2148.cfg
@@ -32,8 +32,7 @@ reset_config trst_and_srst srst_pulls_trst
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
diff --git a/tcl/target/lpc2294.cfg b/tcl/target/lpc2294.cfg
index c3746c1f..d20f0d30 100644
--- a/tcl/target/lpc2294.cfg
+++ b/tcl/target/lpc2294.cfg
@@ -26,7 +26,7 @@ reset_config trst_and_srst srst_pulls_trst
 #jtag scan chain
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
 
diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg
index 16232383..270cd4d1 100644
--- a/tcl/target/lpc2378.cfg
+++ b/tcl/target/lpc2378.cfg
@@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 # LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
diff --git a/tcl/target/lpc2478.cfg b/tcl/target/lpc2478.cfg
index 2cd760c3..2c8fdce3 100644
--- a/tcl/target/lpc2478.cfg
+++ b/tcl/target/lpc2478.cfg
@@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 # LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
diff --git a/tcl/target/mega128.cfg b/tcl/target/mega128.cfg
index 964542c9..6c0ad859 100644
--- a/tcl/target/mega128.cfg
+++ b/tcl/target/mega128.cfg
@@ -17,7 +17,7 @@ if { [info exists CPUTAPID ] } {
 }
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME
 
 #$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
diff --git a/tcl/target/netx500.cfg b/tcl/target/netx500.cfg
index c639017b..7dafdc0d 100644
--- a/tcl/target/netx500.cfg
+++ b/tcl/target/netx500.cfg
@@ -29,6 +29,6 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 jtag_nsrst_delay 100
 jtag_ntrst_delay 100
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
 
diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index 139f801f..009a3cd1 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -28,7 +28,7 @@ reset_config srst_only
 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
 jtag newtap $_CHIPNAME cpu -irlen 5  -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0
diff --git a/tcl/target/pxa270.cfg b/tcl/target/pxa270.cfg
index 34bb60d4..6f209f89 100644
--- a/tcl/target/pxa270.cfg
+++ b/tcl/target/pxa270.cfg
@@ -30,7 +30,7 @@ jtag_nsrst_delay 260
 # the rest of the needed delays are built into the openocd program
 jtag_ntrst_delay 0
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
 
 target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x
diff --git a/tcl/target/sam7se512.cfg b/tcl/target/sam7se512.cfg
index 6f0aa38c..98e952c3 100644
--- a/tcl/target/sam7se512.cfg
+++ b/tcl/target/sam7se512.cfg
@@ -29,7 +29,7 @@ reset_config srst_only srst_pulls_trst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 # The target
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
diff --git a/tcl/target/sam7x256.cfg b/tcl/target/sam7x256.cfg
index 789f7dd6..b659dd5f 100644
--- a/tcl/target/sam7x256.cfg
+++ b/tcl/target/sam7x256.cfg
@@ -21,9 +21,9 @@ if { [info exists CPUTAPID ] } {
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+
 $_TARGETNAME configure -event reset-init { 
 	# disable watchdog
 	mww 0xfffffd44 0x00008000	
diff --git a/tcl/target/samsung_s3c2410.cfg b/tcl/target/samsung_s3c2410.cfg
index 3c0768bc..6dca7efd 100644
--- a/tcl/target/samsung_s3c2410.cfg
+++ b/tcl/target/samsung_s3c2410.cfg
@@ -25,7 +25,7 @@ reset_config trst_and_srst
 #jtag scan chain
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x30800000 -work-area-size 0x20000 -work-area-backup 0
diff --git a/tcl/target/samsung_s3c2440.cfg b/tcl/target/samsung_s3c2440.cfg
index 12bb4085..4cfa4d82 100644
--- a/tcl/target/samsung_s3c2440.cfg
+++ b/tcl/target/samsung_s3c2440.cfg
@@ -26,8 +26,9 @@ if { [info exists CPUTAPID ] } {
 #jtag scan chain
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
+
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x200000 -work-area-size 0x4000 -work-area-backup 1
 
 #reset configuration
diff --git a/tcl/target/samsung_s3c2450.cfg b/tcl/target/samsung_s3c2450.cfg
index f7b73930..ec77291d 100644
--- a/tcl/target/samsung_s3c2450.cfg
+++ b/tcl/target/samsung_s3c2450.cfg
@@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
 #jtag scan chain
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
 
 # FIX!!!!! should this really use srst_pulls_trst?
@@ -46,4 +46,4 @@ target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNA
 # However, without "srst_pulls_trst", then "reset halt" produces weird
 # errors:
 # WARNING: unknown debug reason: 0x0
-reset_config trst_and_srst
\ No newline at end of file
+reset_config trst_and_srst
diff --git a/tcl/target/samsung_s3c4510.cfg b/tcl/target/samsung_s3c4510.cfg
index 65e7fd84..b594e329 100644
--- a/tcl/target/samsung_s3c4510.cfg
+++ b/tcl/target/samsung_s3c4510.cfg
@@ -20,6 +20,6 @@ if { [info exists CPUTAPID ] } {
 }
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME  
 
diff --git a/tcl/target/samsung_s3c6410.cfg b/tcl/target/samsung_s3c6410.cfg
index 4991c811..fd9031be 100644
--- a/tcl/target/samsung_s3c6410.cfg
+++ b/tcl/target/samsung_s3c6410.cfg
@@ -39,7 +39,7 @@ if { [info exists CPUTAPID ] } {
 jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0xe  -expected-id $_BSTAPID
 jtag newtap $_CHIPNAME cpu     -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm11 -endian $_ENDIAN  -chain-position $_TARGETNAME -variant arm1176
 
 jtag_nsrst_delay 500
diff --git a/tcl/target/sharp_lh79532.cfg b/tcl/target/sharp_lh79532.cfg
index a239e3c5..c04b8167 100644
--- a/tcl/target/sharp_lh79532.cfg
+++ b/tcl/target/sharp_lh79532.cfg
@@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
 }
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME  
 
 
diff --git a/tcl/target/smp8634.cfg b/tcl/target/smp8634.cfg
index c1d61882..b6b037aa 100644
--- a/tcl/target/smp8634.cfg
+++ b/tcl/target/smp8634.cfg
@@ -28,5 +28,5 @@ reset_config trst_and_srst separate
 # format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
 jtag newtap $_CHIPNAME cpu -irlen 5  -ircapture 0x1 -irmask 0x1
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index 04cee234..b2c63783 100644
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -57,7 +57,7 @@ if { [info exists BSTAPID ] } {
 }   
 jtag newtap $_CHIPNAME bs  -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
diff --git a/tcl/target/str710.cfg b/tcl/target/str710.cfg
index 2d9d2fc4..39745717 100644
--- a/tcl/target/str710.cfg
+++ b/tcl/target/str710.cfg
@@ -26,8 +26,9 @@ reset_config trst_and_srst srst_pulls_trst
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+
 $_TARGETNAME configure -event reset-start { jtag_khz 10 }
 $_TARGETNAME configure -event reset-init { jtag_khz 6000 }
 $_TARGETNAME configure -event gdb-flash-erase-start {
diff --git a/tcl/target/str730.cfg b/tcl/target/str730.cfg
index 5d01ec71..53d7e1a1 100644
--- a/tcl/target/str730.cfg
+++ b/tcl/target/str730.cfg
@@ -31,8 +31,9 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_C
 jtag_nsrst_delay 500
 jtag_ntrst_delay 500
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+
 $_TARGETNAME configure -event reset-start { jtag_khz 10 }
 $_TARGETNAME configure -event reset-init { jtag_khz 3000 }
 $_TARGETNAME configure -event gdb-flash-erase-start {
diff --git a/tcl/target/str750.cfg b/tcl/target/str750.cfg
index 6b5e66c3..837f6b99 100644
--- a/tcl/target/str750.cfg
+++ b/tcl/target/str750.cfg
@@ -33,7 +33,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_C
 jtag_nsrst_delay 500
 jtag_ntrst_delay 500
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
 
 $_TARGETNAME configure -event reset-start  { jtag_khz 10 }
diff --git a/tcl/target/str912.cfg b/tcl/target/str912.cfg
index 705326b5..f0709eb4 100644
--- a/tcl/target/str912.cfg
+++ b/tcl/target/str912.cfg
@@ -43,7 +43,7 @@ if { [info exists BSTAPID ] } {
 }
 jtag newtap $_CHIPNAME bs    -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
 
 $_TARGETNAME configure -event reset-start { jtag_rclk 16 }
diff --git a/tcl/target/test_reset_syntax_error.cfg b/tcl/target/test_reset_syntax_error.cfg
index e573c1c0..f2949e14 100644
--- a/tcl/target/test_reset_syntax_error.cfg
+++ b/tcl/target/test_reset_syntax_error.cfg
@@ -8,7 +8,7 @@ set _CHIPNAME syntaxtest
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf 
 
 #target configuration
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 $_TARGETNAME configure -event reset-init { 
diff --git a/tcl/target/xba_revA3.cfg b/tcl/target/xba_revA3.cfg
index 007cb9e1..202ed608 100644
--- a/tcl/target/xba_revA3.cfg
+++ b/tcl/target/xba_revA3.cfg
@@ -28,8 +28,9 @@ jtag_ntrst_delay 100
 #jtag scan chain
 jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
+
 $_TARGETNAME configure -event reset-init {
 	#############################################################################
 	# setup expansion bus CS, disable external wdt