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author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-08-26 19:22:28 +0000 |
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committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-08-26 19:22:28 +0000 |
commit | fc7cd1d85e6459ce8d7e453cfe05a254a1f92028 (patch) | |
tree | a6ead899f05e62ad32194ef6b4a443a966a6d8e3 | |
parent | 56a04a3413a6427ef83dc18e3f7c7c13fd217113 (diff) | |
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Matt Hsu <matt@0xlab.org> cortex-a8: Copy some more registers from the documentation
git-svn-id: svn://svn.berlios.de/openocd/trunk@2635 b42882b7-edfa-0310-969c-e2dbd0fdcd60
-rw-r--r-- | src/target/cortex_a8.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/target/cortex_a8.h b/src/target/cortex_a8.h index c1610d54..bb57b13e 100644 --- a/src/target/cortex_a8.h +++ b/src/target/cortex_a8.h @@ -42,6 +42,7 @@ extern char* cortex_a8_state_strings[]; /* Debug Control Block */ #define CPUDBG_DIDR 0x000 #define CPUDBG_WFAR 0x018 +#define CPUDBG_VCR 0x01C #define CPUDBG_DSCCR 0x028 #define CPUDBG_DTRRX 0x080 #define CPUDBG_ITR 0x084 @@ -52,6 +53,13 @@ extern char* cortex_a8_state_strings[]; #define CPUDBG_BCR_BASE 0x140 #define CPUDBG_WVR_BASE 0x180 +#define CPUDBG_OSLAR 0x300 +#define CPUDBG_OSLSR 0x304 +#define CPUDBG_OSSRR 0x308 + +#define CPUDBG_PRCR 0x310 +#define CPUDBG_PRSR 0x314 + #define CPUDBG_CPUID 0xD00 #define CPUDBG_CTYPR 0xD04 #define CPUDBG_TTYPR 0xD0C |