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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-27 18:53:43 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-27 18:53:43 -0800 |
| commit | 5782999f6030acb560a3b02da10354eb099c45a4 (patch) | |
| tree | a95171af756b1ef9ff632d634265c74b07d7f5f9 /NEWS | |
| parent | ddce517e3a2144e27a26090aef7ef1a7f2270af1 (diff) | |
| download | openocd_libswd-5782999f6030acb560a3b02da10354eb099c45a4.tar.gz openocd_libswd-5782999f6030acb560a3b02da10354eb099c45a4.tar.bz2 openocd_libswd-5782999f6030acb560a3b02da10354eb099c45a4.tar.xz openocd_libswd-5782999f6030acb560a3b02da10354eb099c45a4.zip | |
NEWS: mention new reset-assert event
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'NEWS')
| -rw-r--r-- | NEWS | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -8,6 +8,8 @@ JTAG Layer: Boundary Scan: Target Layer: + General + - new "reset-assert" event, for systems without SRST ARM - renamed "armv4_5" command prefix as "arm" - recognize TrustZone "Secure Monitor" mode @@ -22,6 +24,7 @@ Target Layer: Cortex-A8 - support "arm regs" command - can access all core modes and registers + - supports "reset-assert" event (used on OMAP3530) Cortex-M3 - Exposed DWT registers like cycle counter |