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| author | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-11-22 13:03:10 +0000 |
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| committer | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-11-22 13:03:10 +0000 |
| commit | e9297b40b994f071474210e7d9e224d50e25fcaf (patch) | |
| tree | c04957b7721ab6825e73fad0775677643f82fc23 /README | |
| parent | 03e8f264f4c66baec9b86778d3488b23e0a8c0b6 (diff) | |
| download | openocd_libswd-e9297b40b994f071474210e7d9e224d50e25fcaf.tar.gz openocd_libswd-e9297b40b994f071474210e7d9e224d50e25fcaf.tar.bz2 openocd_libswd-e9297b40b994f071474210e7d9e224d50e25fcaf.tar.xz openocd_libswd-e9297b40b994f071474210e7d9e224d50e25fcaf.zip | |
- added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration
- added support for loading .bit files into Xilinx Virtex-II devices
- added support for the Gateworks GW16012 JTAG dongle
- merged CFI fixes from XScale branch
- a few minor fixes
git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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