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| author | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-08-31 12:55:54 +0000 |
|---|---|---|
| committer | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-08-31 12:55:54 +0000 |
| commit | 4cdb7c5a530164a392f41287a1a2a15c54c3a1ca (patch) | |
| tree | de89ab5bb4fd331acf36ea13712c108968b63dff /doc | |
| parent | 3acb107b9ae4e3d38d3fcfd29b455ebcfb444696 (diff) | |
| download | openocd_libswd-4cdb7c5a530164a392f41287a1a2a15c54c3a1ca.tar.gz openocd_libswd-4cdb7c5a530164a392f41287a1a2a15c54c3a1ca.tar.bz2 openocd_libswd-4cdb7c5a530164a392f41287a1a2a15c54c3a1ca.tar.xz openocd_libswd-4cdb7c5a530164a392f41287a1a2a15c54c3a1ca.zip | |
- added missing AT91RM9200 files
- bumped OpenOCD version date
git-svn-id: svn://svn.berlios.de/openocd/trunk@91 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/configs/at91sam7_ecr.cfg | 25 | ||||
| -rw-r--r-- | doc/scripts/at91sam7_ecr.script | 10 |
2 files changed, 35 insertions, 0 deletions
diff --git a/doc/configs/at91sam7_ecr.cfg b/doc/configs/at91sam7_ecr.cfg new file mode 100644 index 00000000..69a2d4d7 --- /dev/null +++ b/doc/configs/at91sam7_ecr.cfg @@ -0,0 +1,25 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface at91rm9200 +at91rm9200_device rea_ecr +jtag_speed 0 +reset_config srst_only + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target configuration +daemon_startup reset + +#target <type> <startup mode> +#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm7tdmi little reset_halt 0 arm7tdmi +target_script 0 reset at91sam7_ecr.script +working_area 0 0x40000000 0x40000 nobackup + +#flash configuration +flash bank at91sam7 0 0 0 0 0 diff --git a/doc/scripts/at91sam7_ecr.script b/doc/scripts/at91sam7_ecr.script new file mode 100644 index 00000000..f575e572 --- /dev/null +++ b/doc/scripts/at91sam7_ecr.script @@ -0,0 +1,10 @@ +mww 0xfffffd44 0x00008000 # disable watchdog +mww 0xfffffd08 0xa5000001 # enable user reset +mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator +sleep 10 +mww 0xfffffc2c 0x12560a64 # CKGR_PLLR: 119.8MHz (DIV=100,MUL=598+1) +sleep 10 +mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 = 59.9MHz +sleep 10 +mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) +arm7_9 force_hw_bkpts enable # program resides in flash |