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| author | Aaron Carroll <aaronc@cse.unsw.edu.au> | 2011-01-28 17:20:24 +1100 |
|---|---|---|
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2011-01-31 08:46:16 +0100 |
| commit | 827053c79d4740d65fb92f9ff97a613f292682c8 (patch) | |
| tree | 1d8962194f3035e4f9fe0727c9278cef852cda82 /doc | |
| parent | e26bda10bc8bba1721ffddecd41a79acc3586331 (diff) | |
| download | openocd_libswd-827053c79d4740d65fb92f9ff97a613f292682c8.tar.gz openocd_libswd-827053c79d4740d65fb92f9ff97a613f292682c8.tar.bz2 openocd_libswd-827053c79d4740d65fb92f9ff97a613f292682c8.tar.xz openocd_libswd-827053c79d4740d65fb92f9ff97a613f292682c8.zip | |
openocd.texi: minor fixes in Reset Configuration
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/openocd.texi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 8ee328bd..7772d788 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -2633,7 +2633,7 @@ with this signal behave exactly like pressing a RESET button. @emph{JTAG TAP Reset} ... the @emph{TRST} hardware signal resets just the TAP controllers connected to the JTAG adapter. Such resets should not be visible to the rest of the system; resetting a -device's the TAP controller just puts that controller into a known state. +device's TAP controller just puts that controller into a known state. @item @emph{Emulation Reset} ... many devices can be reset through JTAG commands. These resets are often distinguishable from system @@ -2673,7 +2673,7 @@ Use the @command{reset_config} @var{signals} options to say when either of those signals is not connected. When SRST is not available, your code might not be able to rely on controllers having been fully reset during code startup. -Missing TRST is not a problem, since JTAG level resets can +Missing TRST is not a problem, since JTAG-level resets can be triggered using with TMS signaling. @item @emph{Signals shorted} ... Sometimes a chip, board, or |