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| author | David Brownell <dbrownell@users.sourceforge.net> | 2010-03-15 08:41:30 -0700 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-03-15 08:41:30 -0700 |
| commit | b559b273b526b3077b3ca219eecc8df9f86efac0 (patch) | |
| tree | 5848552f09431e065550e60e8106029e01db3136 /doc | |
| parent | 96f9790279f74f39b35fc3ad09340fd03123180c (diff) | |
| download | openocd_libswd-b559b273b526b3077b3ca219eecc8df9f86efac0.tar.gz openocd_libswd-b559b273b526b3077b3ca219eecc8df9f86efac0.tar.bz2 openocd_libswd-b559b273b526b3077b3ca219eecc8df9f86efac0.tar.xz openocd_libswd-b559b273b526b3077b3ca219eecc8df9f86efac0.zip | |
rename jtag_nsrst_delay as adapter_nsrst_delay
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ... it needs to be used with non-JTAG
transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/openocd.texi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 5a1e0956..9d1532b1 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -2603,7 +2603,7 @@ stops issuing the reset. For example, there may be chip or board requirements that all reset pulses last for at least a certain amount of time; and reset buttons commonly have hardware debouncing. -Use the @command{jtag_nsrst_delay} and @command{jtag_ntrst_delay} +Use the @command{adapter_nsrst_delay} and @command{jtag_ntrst_delay} commands to say when extra delays are needed. @item @emph{Drive type} ... Reset lines often have a pullup @@ -2649,7 +2649,7 @@ after asserting nSRST (active-low system reset) before allowing it to be deasserted. @end deffn -@deffn {Command} jtag_nsrst_delay milliseconds +@deffn {Command} adapter_nsrst_delay milliseconds How long (in milliseconds) OpenOCD should wait after deasserting nSRST (active-low system reset) before starting new JTAG operations. When a board has a reset button connected to SRST line it will |