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author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-07 19:10:51 +0000 |
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committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-07 19:10:51 +0000 |
commit | c28efd0a0e65a4176103afb67af05ccc82bcede4 (patch) | |
tree | 409eb343804b06925d47a1841915f1f6c342f0b1 /doc | |
parent | b90d7d12f1359899a1d690c7235311973e312739 (diff) | |
download | openocd_libswd-c28efd0a0e65a4176103afb67af05ccc82bcede4.tar.gz openocd_libswd-c28efd0a0e65a4176103afb67af05ccc82bcede4.tar.bz2 openocd_libswd-c28efd0a0e65a4176103afb67af05ccc82bcede4.tar.xz openocd_libswd-c28efd0a0e65a4176103afb67af05ccc82bcede4.zip |
retire endstate command
git-svn-id: svn://svn.berlios.de/openocd/trunk@2095 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'doc')
-rw-r--r-- | doc/openocd.texi | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 523be2b2..91cc025b 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -4474,14 +4474,6 @@ tasks which waste bandwidth by flushing small transfers too often, instead of batching them into larger operations. @end deffn -@deffn Command {endstate} tap_state -Flush any pending JTAG operations, -and return with all TAPs in @var{tap_state}. -This state should be a stable state such as @sc{reset}, -@sc{run/idle}, -@sc{drpause}, or @sc{irpause}. -@end deffn - @deffn Command {irscan} [tap instruction]+ [@option{-endstate} tap_state] For each @var{tap} listed, loads the instruction register with its associated numeric @var{instruction}. @@ -4552,7 +4544,7 @@ Default is enabled. @cindex TAP state names The @var{tap_state} names used by OpenOCD in the @command{drscan}, -@command{endstate}, and @command{irscan} commands are: +and @command{irscan} commands are: @itemize @bullet @item @b{RESET} @@ -4578,9 +4570,6 @@ face of TMS fixed and a free-running JTAG clock; for all the others, the next TCK transition changes to a new state. @itemize @bullet -@item @sc{reset} is probably most useful with @command{endstate}, -but entering it frequently has side effects. -(This is the only stable state with TMS high.) @item From @sc{drshift} and @sc{irshift}, clock transitions will produce side effects by changing register contents. The values to be latched in upcoming @sc{drupdate} or @sc{irupdate} states @@ -4838,6 +4827,9 @@ become much shorter. @item @b{arm7_9 fast_writes} @cindex arm7_9 fast_writes @*Use @command{arm7_9 fast_memory_access} instead. +@item @b{endstate} +@cindex endstate +@*An buggy old command that would not really work since background polling would wipe out the global endstate @xref{arm7_9 fast_memory_access}. @item @b{arm7_9 force_hw_bkpts} @*Use @command{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints |