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| author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-22 02:32:31 +0000 |
|---|---|---|
| committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-22 02:32:31 +0000 |
| commit | 3d0b474da9459296b74932a2adbd0e2e450ab143 (patch) | |
| tree | 4fb3ebfe863bd6f6b72b28176d9b6061f8463257 /src/flash/s3c24xx_regs_nand.h | |
| parent | ebd3f88798902be229d00f95ece5ba250db8efba (diff) | |
| download | openocd_libswd-3d0b474da9459296b74932a2adbd0e2e450ab143.tar.gz openocd_libswd-3d0b474da9459296b74932a2adbd0e2e450ab143.tar.bz2 openocd_libswd-3d0b474da9459296b74932a2adbd0e2e450ab143.tar.xz openocd_libswd-3d0b474da9459296b74932a2adbd0e2e450ab143.zip | |
Submitted by David Brownell <david-b@pacbell.net>:
Improve support for the DM355 EVM board, and eventually other boards based
on DaVinci chips:
- Provide generic "davinci.cfg" to hold utilities that can be reused by
different chips in this family. Start with PINMUX, PSC, and PLL setup.
- DM355 chip support updates: provide a dictionary with chip-specific
symbols, load those utilities.
- Create a new dm355evm board file, with a reset-init event handler
which uses those utilities to set up PLLs and clocks, configure the
pins, and improve the JTAG speed limit.
Also a minor tweak: provide a virtual address for the work area, matching
what the very latest kernels do. It's probably unwise to use OpenOCD while
the MMU is active though.
The DRAM isn't yet accessible, but NAND access is mostly ready.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1881 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/flash/s3c24xx_regs_nand.h')
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