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author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-27 23:54:16 +0000 |
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committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-27 23:54:16 +0000 |
commit | 19124a34f31235c1bb6f0389112f2408f15e1f02 (patch) | |
tree | d81f4c21c8862fff03bde6ec3392d3a9ed414bda /src/flash | |
parent | 9a8650ec057a9de6db3987c709becf2880d9c524 (diff) | |
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Fix potentialyl unaligned memory accesses in mflash driver.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1935 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/flash')
-rw-r--r-- | src/flash/mflash.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/flash/mflash.c b/src/flash/mflash.c index f2cfd4a1..47c73382 100644 --- a/src/flash/mflash.c +++ b/src/flash/mflash.c @@ -1126,8 +1126,9 @@ static int mg_set_pll(mg_pll_t *pll) u8 buff[512]; memset(buff, 0xff, 512); - *((u32 *)&buff[0]) = pll->lock_cyc; /* PLL Lock cycle */ - *((u16 *)&buff[4]) = pll->feedback_div; /* PLL Feedback 9bit Divider */ + /* PLL Lock cycle and Feedback 9bit Divider */ + memcpy(buff, &pll->lock_cyc, sizeof(u32)); + memcpy(buff + 4, &pll->feedback_div, sizeof(u16)); buff[6] = pll->input_div; /* PLL Input 5bit Divider */ buff[7] = pll->output_div; /* PLL Output Divider */ |