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authordrath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2007-08-10 19:44:06 +0000
committerdrath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2007-08-10 19:44:06 +0000
commit20e4e77cdf366dedac21ff5670c54291feadfc05 (patch)
tree95363c4dc5940d7e0e94be81ba76b73e92ff1cf3 /src/target/arm7_9_common.c
parent835e6440b8d1d26b4e041be7edab200ab2c572ee (diff)
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- renamed M5960 USB JTAG to "flyswatter"
- make ep93xx and at91rm9200 bitbang JTAG interfaces dependant on ARM host (thanks to Vincent Palatin) - various whitespace fixes - removed various warnings - add support for Debian GNU/kFreeBSD (thanks to Uwe Hermann) - fix OpenOCD compilation for various platforms (thanks to Uwe Hermann and Vincent Palatin) - switched order of JTAG chain examination and validation (examine first, then multiple validation tries even if examination failed) - added target_request subsystem to handle requests from the target (debug messages and tracepoints implemented, future enhancements might include semihosting, all ARM7/9 only for now) - added support for GDB vFlashXXX packets (thanks to Pavel Chromy) - added support for receiving data via ARM7/9 DCC - reworked flash writing. the 'flash write' command is now deprecated and replaced by 'flash write_binary' (old syntax and behaviour) and 'flash write_image' (write image files (bin, hex, elf, s19) to a target). - added support for AMD/ST/SST 29F400B non-cfi flashes git-svn-id: svn://svn.berlios.de/openocd/trunk@190 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/arm7_9_common.c')
-rw-r--r--src/target/arm7_9_common.c52
1 files changed, 52 insertions, 0 deletions
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index cda99d84..35cbe6e5 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -25,6 +25,7 @@
#include "embeddedice.h"
#include "target.h"
+#include "target_request.h"
#include "armv4_5.h"
#include "arm_jtag.h"
#include "jtag.h"
@@ -589,6 +590,55 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target)
return ERROR_OK;
}
+int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer)
+{
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+ u32 *data;
+ int i;
+
+ data = malloc(size * (sizeof(u32)));
+
+ embeddedice_receive(jtag_info, data, size);
+
+ for (i = 0; i < size; i++)
+ {
+ h_u32_to_le(buffer + (i * 4), data[i]);
+ }
+
+ free(data);
+
+ return ERROR_OK;
+}
+
+int arm7_9_handle_target_request(void *priv)
+{
+ target_t *target = priv;
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+ reg_t *dcc_control = &arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL];
+
+ if (target->state == TARGET_RUNNING)
+ {
+ /* read DCC control register */
+ embeddedice_read_reg(dcc_control);
+ jtag_execute_queue();
+
+ /* check W bit */
+ if (buf_get_u32(dcc_control->value, 1, 1) == 1)
+ {
+ u32 request;
+
+ embeddedice_receive(jtag_info, &request, 1);
+ target_request(target, request);
+ }
+ }
+
+ return ERROR_OK;
+}
+
enum target_state arm7_9_poll(target_t *target)
{
int retval;
@@ -2467,5 +2517,7 @@ int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9)
armv4_5_init_arch_info(target, armv4_5);
+ target_register_timer_callback(arm7_9_handle_target_request, 1, 1, target);
+
return ERROR_OK;
}