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| author | David Brownell <dbrownell@users.sourceforge.net> | 2010-01-07 15:52:38 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-01-07 16:18:01 -0800 |
| commit | 17921f51abc4402c9c5aadf3e664eb37663f744f (patch) | |
| tree | 5498b9708468e97529bb20e9799e9e99fc2f5af7 /src/target/arm_adi_v5.c | |
| parent | e19fe9ad09e28df1976257052afe6edf765aa778 (diff) | |
| download | openocd_libswd-17921f51abc4402c9c5aadf3e664eb37663f744f.tar.gz openocd_libswd-17921f51abc4402c9c5aadf3e664eb37663f744f.tar.bz2 openocd_libswd-17921f51abc4402c9c5aadf3e664eb37663f744f.tar.xz openocd_libswd-17921f51abc4402c9c5aadf3e664eb37663f744f.zip | |
ARMv7: help/usage updates
Provide helptext which was sometimes missing; update some of it
to be more accurate.
Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.
Don't use "&function"; functions are like arrays, their address
is their name. Shrink some overlong lines, remove some empties.
Add a couple comments about things that should change: those
extra TCK cycles for MEM-AP reads are in the wrong place (that
might explain some problems we've seen); the DAP command tables
should be shared, not copied.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/arm_adi_v5.c')
| -rw-r--r-- | src/target/arm_adi_v5.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 96accf3e..e490f2e5 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -101,6 +101,10 @@ static int adi_jtag_dp_scan(struct swjdp_common *swjdp, arm_jtag_set_instr(jtag_info, instr, NULL); /* Add specified number of tck clocks before accessing memory bus */ + + /* REVISIT these TCK cycles should be *AFTER* updating APACC, since + * they provide more time for the (MEM) AP to complete the read ... + */ if ((instr == JTAG_DP_APACC) && ((reg_addr == AP_REG_DRW) || ((reg_addr & 0xF0) == AP_REG_BD0)) @@ -137,6 +141,10 @@ static int adi_jtag_dp_scan_u32(struct swjdp_common *swjdp, arm_jtag_set_instr(jtag_info, instr, NULL); /* Add specified number of tck clocks before accessing memory bus */ + + /* REVISIT these TCK cycles should be *AFTER* updating APACC, since + * they provide more time for the (MEM) AP to complete the read ... + */ if ((instr == JTAG_DP_APACC) && ((reg_addr == AP_REG_DRW) || ((reg_addr & 0xF0) == AP_REG_BD0)) |