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| author | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2007-03-26 21:47:26 +0000 |
|---|---|---|
| committer | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2007-03-26 21:47:26 +0000 |
| commit | 5ed126c4f90948fbf53d186dc4ef49018fb5ecfc (patch) | |
| tree | 40a1444d10e0413a202440b595b3a707df22a513 /src/target/arm_disassembler.c | |
| parent | 9b13ffe4e2edc1eabdf52c2d117396b1b21de968 (diff) | |
| download | openocd_libswd-5ed126c4f90948fbf53d186dc4ef49018fb5ecfc.tar.gz openocd_libswd-5ed126c4f90948fbf53d186dc4ef49018fb5ecfc.tar.bz2 openocd_libswd-5ed126c4f90948fbf53d186dc4ef49018fb5ecfc.tar.xz openocd_libswd-5ed126c4f90948fbf53d186dc4ef49018fb5ecfc.zip | |
- fixed arm926 cp15 command bug (thanks to Vincent Palatin for this patch)
- fixed compiler warnings throughout the code (thanks to Vincent Palatin for this patch)
- added support for accessing ETB (embedded trace buffer) registers
git-svn-id: svn://svn.berlios.de/openocd/trunk@134 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/arm_disassembler.c')
| -rw-r--r-- | src/target/arm_disassembler.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 8a048cfc..f9e0227a 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -682,7 +682,7 @@ int evaluate_mul_and_extra_ld_st(u32 opcode, u32 address, arm_instruction_t *ins /* Multiply (accumulate) long */ if ((opcode & 0x0f800000) == 0x00800000) { - char* mnemonic; + char* mnemonic = NULL; u8 Rm, Rs, RdHi, RdLow, S; Rm = opcode & 0xf; Rs = (opcode & 0xf00) >> 8; @@ -841,7 +841,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction) if ((opcode & 0x0000000f0) == 0x00000050) { u8 Rm, Rd, Rn; - char *mnemonic; + char *mnemonic = NULL; Rm = opcode & 0xf; Rd = (opcode & 0xf000) >> 12; Rn = (opcode & 0xf0000) >> 16; @@ -967,7 +967,7 @@ int evaluate_misc_instr(u32 opcode, u32 address, arm_instruction_t *instruction) int evaluate_data_proc(u32 opcode, u32 address, arm_instruction_t *instruction) { u8 I, op, S, Rn, Rd; - char *mnemonic; + char *mnemonic = NULL; char shifter_operand[32]; I = (opcode & 0x02000000) >> 25; |