summaryrefslogtreecommitdiff
path: root/src/target/armv4_5.c
diff options
context:
space:
mode:
authorDavid Brownell <dbrownell@users.sourceforge.net>2009-11-13 16:22:36 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-11-13 16:22:36 -0800
commit04b514707f221ba00ae789e69f6f8047af96125d (patch)
tree568a7eb1c0368cdf8aadd69e27bb99f570bc130c /src/target/armv4_5.c
parent38e8d60f79fd51424c556e07653713254c2d9b4e (diff)
downloadopenocd_libswd-04b514707f221ba00ae789e69f6f8047af96125d.tar.gz
openocd_libswd-04b514707f221ba00ae789e69f6f8047af96125d.tar.bz2
openocd_libswd-04b514707f221ba00ae789e69f6f8047af96125d.tar.xz
openocd_libswd-04b514707f221ba00ae789e69f6f8047af96125d.zip
target: remove unused "bitfield" infrastructure
We have too many different registers, and too many version and context dependent interpretations, for this type of bitfield management to be scalable. (Anyone who really wants bitfield interpretation *can* do that in Tcl code...) There are ... quite a few copies of the same ARM dummy registers. There should eventually be one copy; this many is craziness. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/armv4_5.c')
-rw-r--r--src/target/armv4_5.c34
1 files changed, 14 insertions, 20 deletions
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 6e3eff68..aa05e831 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -32,22 +32,6 @@
#include "binarybuffer.h"
-struct bitfield_desc armv4_5_psr_bitfield_desc[] =
-{
- {"M[4:0]", 5},
- {"T", 1},
- {"F", 1},
- {"I", 1},
- {"reserved", 16},
- {"J", 1},
- {"reserved", 2},
- {"Q", 1},
- {"V", 1},
- {"C", 1},
- {"Z", 1},
- {"N", 1},
-};
-
char* armv4_5_core_reg_list[] =
{
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13_usr", "lr_usr", "pc",
@@ -157,14 +141,26 @@ uint8_t armv4_5_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
struct reg armv4_5_gdb_dummy_fp_reg =
{
- "GDB dummy floating-point register", armv4_5_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
+ .name = "GDB dummy floating-point register",
+ .value = armv4_5_gdb_dummy_fp_value,
+ .dirty = 0,
+ .valid = 1,
+ .size = 96,
+ .arch_info = NULL,
+ .arch_type = 0,
};
uint8_t armv4_5_gdb_dummy_fps_value[] = {0, 0, 0, 0};
struct reg armv4_5_gdb_dummy_fps_reg =
{
- "GDB dummy floating-point status register", armv4_5_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0
+ .name = "GDB dummy floating-point status register",
+ .value = armv4_5_gdb_dummy_fps_value,
+ .dirty = 0,
+ .valid = 1,
+ .size = 32,
+ .arch_info = NULL,
+ .arch_type = 0,
};
int armv4_5_get_core_reg(struct reg *reg)
@@ -278,8 +274,6 @@ struct reg_cache* armv4_5_build_reg_cache(struct target *target, struct arm *arm
reg_list[i].value = calloc(1, 4);
reg_list[i].dirty = 0;
reg_list[i].valid = 0;
- reg_list[i].bitfield_desc = NULL;
- reg_list[i].num_bitfields = 0;
reg_list[i].arch_type = armv4_5_core_reg_arch_type;
reg_list[i].arch_info = &arch_info[i];
}