summaryrefslogtreecommitdiff
path: root/src/target/armv4_5.c
diff options
context:
space:
mode:
authordrath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2006-06-12 16:49:49 +0000
committerdrath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2006-06-12 16:49:49 +0000
commitb9628accd6da0aef6a9fc03efb96e05afab99c99 (patch)
tree91006cc62c3ca10641efbe41a6829ed16671cf10 /src/target/armv4_5.c
parent335f667d4433e8ca3a57e813fd128b78d8b364d2 (diff)
downloadopenocd_libswd-b9628accd6da0aef6a9fc03efb96e05afab99c99.tar.gz
openocd_libswd-b9628accd6da0aef6a9fc03efb96e05afab99c99.tar.bz2
openocd_libswd-b9628accd6da0aef6a9fc03efb96e05afab99c99.tar.xz
openocd_libswd-b9628accd6da0aef6a9fc03efb96e05afab99c99.zip
- the 'help' command now takes an optional argument to display help only on a certain command (thanks to Andrew Dyer for this enhancement)
- OpenOCD now includes the ability to diassemble instructions on its own (only ARM for now, Thumb might follow). The command is "armv4_5 disassemble <address> <count> ['thumb']" (thumb is currently unsupported). I've compared the produced disassembly against GDB/GNU Objdump output, and it seems to be correct, but there may still be some bugs left. git-svn-id: svn://svn.berlios.de/openocd/trunk@68 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/armv4_5.c')
-rw-r--r--src/target/armv4_5.c44
1 files changed, 44 insertions, 0 deletions
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 51fd4b42..4932e20a 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -19,6 +19,8 @@
***************************************************************************/
#include "config.h"
+#include "arm_disassembler.h"
+
#include "armv4_5.h"
#include "target.h"
@@ -377,6 +379,47 @@ int handle_armv4_5_core_state_command(struct command_context_s *cmd_ctx, char *c
return ERROR_OK;
}
+int handle_armv4_5_disassemble_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+ target_t *target = get_current_target(cmd_ctx);
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ u32 address;
+ int count;
+ int i;
+ arm_instruction_t cur_instruction;
+ u32 opcode;
+ int thumb;
+
+ if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
+ {
+ command_print(cmd_ctx, "current target isn't an ARMV4/5 target");
+ return ERROR_OK;
+ }
+
+ if (argc < 2)
+ {
+ command_print(cmd_ctx, "usage: armv4_5 disassemble <address> <count> ['thumb']");
+ return ERROR_OK;
+ }
+
+ address = strtoul(args[0], NULL, 0);
+ count = strtoul(args[1], NULL, 0);
+
+ if (argc >= 3)
+ if (strcmp(args[2], "thumb") == 0)
+ thumb = 1;
+
+ for (i = 0; i < count; i++)
+ {
+ target->type->read_memory(target, address, 4, 1, (u8*)&opcode);
+ evaluate_opcode(opcode, address, &cur_instruction);
+ command_print(cmd_ctx, "%s", cur_instruction.text);
+ address += (thumb) ? 2 : 4;
+ }
+
+ return ERROR_OK;
+}
+
int armv4_5_register_commands(struct command_context_s *cmd_ctx)
{
command_t *armv4_5_cmd;
@@ -386,6 +429,7 @@ int armv4_5_register_commands(struct command_context_s *cmd_ctx)
register_command(cmd_ctx, armv4_5_cmd, "reg", handle_armv4_5_reg_command, COMMAND_EXEC, "display ARM core registers");
register_command(cmd_ctx, armv4_5_cmd, "core_state", handle_armv4_5_core_state_command, COMMAND_EXEC, "display/change ARM core state <arm|thumb>");
+ register_command(cmd_ctx, armv4_5_cmd, "disassemble", handle_armv4_5_disassemble_command, COMMAND_EXEC, "disassemble instructions <address> <count> ['thumb']");
return ERROR_OK;
}