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| author | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2007-06-24 15:04:07 +0000 |
|---|---|---|
| committer | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2007-06-24 15:04:07 +0000 |
| commit | 8c290412d28f9eef568dac0cfc20ccd4a9eca4d5 (patch) | |
| tree | 40f5da0e30044422956cce2511c936e9af8bca12 /src/target/cortex_swjdp.h | |
| parent | ffb51c23fdd753ada2554b8b6283533089153b46 (diff) | |
| download | openocd_libswd-8c290412d28f9eef568dac0cfc20ccd4a9eca4d5.tar.gz openocd_libswd-8c290412d28f9eef568dac0cfc20ccd4a9eca4d5.tar.bz2 openocd_libswd-8c290412d28f9eef568dac0cfc20ccd4a9eca4d5.tar.xz openocd_libswd-8c290412d28f9eef568dac0cfc20ccd4a9eca4d5.zip | |
- ST STM32x cortex support added
- ST STM32x flash support added
- cleaned up armv7m and cortex-m3 support, removed luminary specific code
- cortex-m3 16bit read/write added (required for STM32x flash programming)
git-svn-id: svn://svn.berlios.de/openocd/trunk@177 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/cortex_swjdp.h')
| -rw-r--r-- | src/target/cortex_swjdp.h | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/src/target/cortex_swjdp.h b/src/target/cortex_swjdp.h index 093f2ed5..ad6c69a6 100644 --- a/src/target/cortex_swjdp.h +++ b/src/target/cortex_swjdp.h @@ -44,8 +44,6 @@ #define CSYSPWRUPREQ (1<<30) #define CSYSPWRUPACK (1<<31) - - #define AHBAP_CSW 0x00 #define AHBAP_TAR 0x04 #define AHBAP_DRW 0x0C @@ -56,7 +54,6 @@ #define AHBAP_DBGROMA 0xF8 #define AHBAP_IDR 0xFC - #define CSW_8BIT 0 #define CSW_16BIT 1 #define CSW_32BIT 2 @@ -65,17 +62,17 @@ #define CSW_ADDRINC_OFF 0 #define CSW_ADDRINC_SINGLE (1<<4) #define CSW_ADDRINC_PACKED (2<<4) -#define CSW_HPROT (1<<25) +#define CSW_HPROT (1<<25) #define CSW_MASTER_DEBUG (1<<29) -#define CSW_DBGSWENABLE (1<<31) -#define TRANS_MODE_NONE 0 +#define CSW_DBGSWENABLE (1<<31) +/* transaction mode */ +#define TRANS_MODE_NONE 0 /* Transaction waits for previous to complete */ #define TRANS_MODE_ATOMIC 1 /* Freerunning transactions with delays and overrun checking */ #define TRANS_MODE_COMPOSITE 2 - typedef struct swjdp_reg_s { int addr; @@ -96,7 +93,7 @@ typedef struct swjdp_common_s u8 trans_mode; u8 trans_rw; u8 ack; - u32 * trans_value; + u32 *trans_value; } swjdp_common_t; /* Internal functions used in the module, partial transactions, use with caution */ @@ -112,7 +109,6 @@ extern int ahbap_read_system_u32(swjdp_common_t *swjdp, u32 address, u32 *value) extern int ahbap_write_system_u32(swjdp_common_t *swjdp, u32 address, u32 value); extern int swjdp_transaction_endcheck(swjdp_common_t *swjdp); - /* External interface, complete atomic operations */ /* Host endian word transfer of single memory and system registers */ extern int ahbap_read_system_atomic_u32(swjdp_common_t *swjdp, u32 address, u32 *value); @@ -124,6 +120,11 @@ extern int ahbap_write_block(swjdp_common_t *swjdp, u8 *buffer, int bytecount, u extern int ahbap_read_coreregister_u32(swjdp_common_t *swjdp, u32 *value, int regnum); extern int ahbap_write_coreregister_u32(swjdp_common_t *swjdp, u32 value, int regnum); +extern int ahbap_read_buf(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); +extern int ahbap_read_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); +extern int ahbap_write_buf(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); +extern int ahbap_write_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address); + /* Initialisation of the debug system, power domains and registers */ extern int ahbap_debugport_init(swjdp_common_t *swjdp); |